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Efficient and Lightweight Quantized Compressive Sensing using μ-Law., , и . ISCAS, стр. 1-5. IEEE, (2018)Complexity Analysis of Reversible Logic Synthesis., , и . CoRR, (2014)System-level reliability exploration framework for heterogeneous MPSoC., , , и . ACM Great Lakes Symposium on VLSI, стр. 9-14. ACM, (2014)Constructive Reversible Logic Synthesis for Boolean Functions with Special Properties., , , и . RC, том 8507 из Lecture Notes in Computer Science, стр. 95-110. Springer, (2014)SI-DFA: Sub-expression integrated Deterministic Finite Automata for Deep Packet Inspection., , и . HPSR, стр. 164-170. IEEE, (2013)Enabling in-memory computation of binary BLAS using ReRAM crossbar arrays., , и . VLSI-SoC, стр. 1-6. IEEE, (2016)Design and analysis of layered coarse-grained reconfigurable architecture., , и . ReConFig, стр. 1-6. IEEE, (2012)Machine Learning based Blind Side-Channel Attacks on PQC-based KEMs - A Case Study of Kyber KEM., , , и . IACR Cryptol. ePrint Arch., (2024)Three Snakes in One Hole: The First Systematic Hardware Accelerator Design for SOSEMANUK with Optional Serpent and SNOW 2.0 Modes., и . IEEE Trans. Computers, 65 (2): 640-653 (2016)Criticality Aware Soft Error Mitigation in the Configuration Memory of SRAM Based FPGA., , , , и . VLSID, стр. 257-262. IEEE, (2019)