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Disambiguation of "Ghoneima, Maged"

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Formal derivation of optimal active shielding for low-power on-chip buses.

, , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (5): 821-836 (2006)

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Maged Younes

Maged Alnawaiseh

Annett Magedanz

Thomas Magedanz

Norbert Magedanz

 

Other publications of authors with the same name

Low-power on-chip bus architecture using dynamic relative delays., and . SoCC, page 233-236. IEEE, (2004)Effect of relative delay on the dissipated energy in coupled interconnects., and . ISCAS (2), page 525-528. IEEE, (2004)A 24 Gbps SerDes transceiver for on-chip networks using a new half-data-rate self-timed 3-level signaling scheme., , , and . ICEAC, page 1-4. IEEE, (2015)A novel digital loop filter architecture for bang-bang ADPLL., , , , , , , and . SoCC, page 45-50. IEEE, (2012)A novel digital loop filter architecture for bang-bang ADPLL., , , , , , , and . SoCC, page 45-50. IEEE, (2012)A novel power gated digitally controlled oscillator., , and . ICEAC, page 1-4. IEEE, (2011)Serial-Link Bus: A Low-Power On-Chip Bus Architecture., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 56-I (9): 2020-2032 (2009)Reconfigurable Systolic-based Pyramidal Neuron Block for CNN Acceleration on FPGA., , and . ICSET, page 179-184. IEEE, (2020)High-Speed 2D Parallel MAC Unit Hardware Accelerator for Convolutional Neural Network., , and . IntelliSys (1), volume 868 of Advances in Intelligent Systems and Computing, page 655-663. Springer, (2018)Formal derivation of optimal active shielding for low-power on-chip buses., and . ICCAD, page 800-807. IEEE Computer Society / ACM, (2004)