( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Statistical yield analysis of silicon-on-insulator embedded DRAM.

, , , , , , , и . ISQED, стр. 190-194. IEEE Computer Society, (2009)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Rajiv Trehan

Rajiv Kumar

Paneerselvam Rajiv

Jidnyasa Joshi

Rajiv Grover

 

Другие публикации лиц с тем же именем

SRAM methodology for yield and power efficiency: per-element selectable supplies and memory reconfiguration schemes., , , , , , , и . ISLPED, стр. 87-92. ACM, (2008)Phase Noise Analysis of Separately Driven Ring Oscillators., , , , , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 69 (11): 4415-4428 (2022)Group LARS-Based Iterative Reweighted Least Squares Methodology for Efficient Statistical Modeling of Memory Designs., , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (12): 5722-5726 (2022)The resilience wall: Cross-layer solution strategies., , , , , , , , , и 3 other автор(ы). VLSI-DAT, стр. 1-11. IEEE, (2014)Design of Deep Sub-Micron CMOS Circuits., и . VLSI Design, стр. 15-16. IEEE Computer Society, (2003)IBM's Blue Logic Design Methodology-Circuits and Physical Design., , , и . VLSI Design, стр. 11-12. IEEE Computer Society, (2001)Regularized logistic regression for fast importance sampling based SRAM yield analysis., , , , и . ISQED, стр. 119-124. IEEE, (2017)Statistical methodology for modeling non-IID memory fails events., , , , и . ISQED, стр. 205-211. IEEE, (2014)Design and CAD Challenges in sub-90nm CMOS Technologies., , , и . ICCAD, стр. 129-137. IEEE Computer Society / ACM, (2003)Session 5 - Memory for emerging applications., и . CICC, стр. 1. IEEE, (2017)