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Disambiguation of "Kanj, Rouwaida"

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Group LARS-Based Iterative Reweighted Least Squares Methodology for Efficient Statistical Modeling of Memory Designs.

, , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (12): 5722-5726 (2022)

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Mahmoud Kanj

Ali Kanj

Rouwaida Abdallah

Matthieu Kanj

Sawsan Kanj

 

Other publications of authors with the same name

Use of scalable Parametric Measurement Macro to improve semiconductor technology characterization and product test., , , , , and . ISQED, page 315-319. IEEE, (2010)Importance Splitting Sample Point Reuse for Efficient Memory Yield Estimation., and . ISCAS, page 1-5. IEEE, (2021)1T1R In-Memory Compute for Winner Takes All Application in Kohonen Neural Networks., , , , , , and . ISCAS, page 1561-1565. IEEE, (2022)High-Density FeFET-based CAM Cell Design Via Multi-Dimensional Encoding., , , , , , and . ACM Great Lakes Symposium on VLSI, page 403-407. ACM, (2023)Hardware-corroborated Variability-Aware SRAM Methodology., , , , , and . VLSI Design, page 344-349. IEEE Computer Society, (2013)PUF and ID-based key distribution security framework for advanced metering infrastructures., , , and . SmartGridComm, page 933-938. IEEE, (2014)Statistical yield analysis of silicon-on-insulator embedded DRAM., , , , , , , and . ISQED, page 190-194. IEEE Computer Society, (2009)Gate Leakage Effects on Yield and Design Considerations of PD/SOI SRAM Designs., , , , , , , and . ISQED, page 33-40. IEEE Computer Society, (2007)Isolated Preset Architecture for a 32nm SOI embedded DRAM macro., , , , , , and . VLSIC, page 110-111. IEEE, (2012)Yield and energy tradeoffs of an NVLatch design using radial sampling., , , and . ICICDT, page 1-4. IEEE, (2017)