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An Evolvable-hardware-based Clock Timing Architecture towards GigaHz Digital Systems, , , and . Proceedings of the Genetic and Evolutionary Computation Conference, 2, page 1204--1210. Orlando, Florida, USA, Morgan Kaufmann, (13-17 July 1999)EM-3: A Lisp-Based Data-Driven Machine., , , and . FGCS, page 524-532. OHMSHA Ltd. Tokyo and North-Holland, (1984)A priority forwarding scheme for real-time multistage interconnection networks., , , and . RTSS, page 208-217. IEEE Computer Society, (1992)Dynamic Load Balancing Using Network Transferable Computer., , , , and . ICDCS Workshops, page 51-57. IEEE Computer Society, (2005)The Gene Concept and its Implementation for a Dataflow Schemed Parallel Computer., , and . PARLE (1), volume 365 of Lecture Notes in Computer Science, page 306-322. Springer, (1989)A Method of Generating Highly Efficient String Matching Circuit for Intrusion Detection., , , and . FPL, page 1-4. IEEE, (2006)Highly Efficient String Matching Circuit for IDS with FPGA., , , and . FCCM, page 285-286. IEEE Computer Society, (2006)Performance comparison of real-time architectures using simulation., , , , , and . RTCSA, page 150-. IEEE Computer Society, (1995)CODA-R: a reconfigurable testbed for real-time parallel computation., , , and . RTCSA, page 252-259. IEEE Computer Society, (1997)A Priority Forwarding Router Chip for Real-Time Interconnection Networks., , , and . RTSS, page 63-73. IEEE Computer Society, (1994)