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STI and eSiGe source/drain epitaxy induced stress modeling in 28 nm technology with replacement gate (RMG) process.

, , , , , , , , и . ESSDERC, стр. 159-162. IEEE, (2013)

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Dmitry Marchenko

Dmitry Suslov

Dmitry Chigrin

Dmitry Lobaskin

Dmitry Ivanov

 

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