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22.3 A 128Gb 8-High 512GB/s HBM2E DRAM with a Pseudo Quarter Bank Structure, Power Dispersion and an Instruction-Based At-Speed PMBIST.

D. Lee, H. Cho, J. Kim, Y. Ku, S. Oh, C. Kim, H. Kim, W. Lee, T. Kim, T. Yun, M. Kim, S. Lim, S. Lee, B. Yun, J. Moon, J. Park, S. Choi, Y. Park, C. Lee, C. Jeong, J. Lee, S. Lee, W. We, J. Yun, D. Lee, J. Shin, S. Kim, J. Lee, J. Choi, Y. Ju, M. Park, K. Lee, Y. Hur, D. Shim, S. Lee, J. Chun, and K. Jin. ISSCC, page 334-336. IEEE, (2020)

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Tae-Sik Park

Hyong-Sik Yun

Bettina Yunis

Jong-Mo Yun

Jaeman Yun

Other publications of authors with the same name

A 192-Gb 12-High 896-GB/s HBM3 DRAM with a TSV Auto-Calibration Scheme and Machine-Learning-Based Layout Optimization.M. Park, H. Cho, T. Yun, S. Byeon, Y. Koo, S. Yoon, D. Lee, S. Choi, J. Park, J. Lee and 39 other author(s). ISSCC, page 444-446. IEEE, (2022)18.3 A 1.2V 64Gb 8-channel 256GB/s HBM DRAM with peripheral-base-die architecture and small-swing technique on heavy load interface.J. Lee, J. Kim, K. Kim, Y. Ku, D. Kim, C. Jeong, T. Yun, H. Kim, H. Cho, Y. Kim and 12 other author(s). ISSCC, page 318-319. IEEE, (2016)High bandwidth memory(HBM) with TSV technique.J. Lee, J. Kim, K. Kim, Y. Ku, D. Kim, C. Jeong, T. Yun, H. Kim, H. Cho, S. Oh and 9 other author(s). ISOCC, page 181-182. IEEE, (2016)22.3 A 128Gb 8-High 512GB/s HBM2E DRAM with a Pseudo Quarter Bank Structure, Power Dispersion and an Instruction-Based At-Speed PMBIST.D. Lee, H. Cho, J. Kim, Y. Ku, S. Oh, C. Kim, H. Kim, W. Lee, T. Kim, T. Yun and 27 other author(s). ISSCC, page 334-336. IEEE, (2020)13.4 A 48GB 16-High 1280GB/s HBM3E DRAM with All-Around Power TSV and a 6-Phase RDQS Scheme for TSV Area Optimization.J. Lee, K. Cho, C. Lee, Y. Lee, J. Park, S. Oh, Y. Ju, C. Jeong, H. Cho, J. Lee and 38 other author(s). ISSCC, page 238-240. IEEE, (2024)A 192-Gb 12-High 896-GB/s HBM3 DRAM With a TSV Auto-Calibration Scheme and Machine-Learning-Based Layout Optimization.M. Park, J. Lee, K. Cho, J. Park, J. Moon, S. Lee, T. Kim, S. Oh, S. Choi, Y. Choi and 29 other author(s). IEEE J. Solid State Circuits, 58 (1): 256-269 (2023)

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Disambiguation of "Yun, Tae Sik"

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22.3 A 128Gb 8-High 512GB/s HBM2E DRAM with a Pseudo Quarter Bank Structure, Power Dispersion and an Instruction-Based At-Speed PMBIST.

Please choose a person to relate this publication to

Tae-Sik Park

Hyong-Sik Yun

Bettina Yunis

Jong-Mo Yun

Jaeman Yun

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Yun, Tae Sik"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 22.3 A 128Gb 8-High 512GB/s HBM2E DRAM with a Pseudo Quarter Bank Structure, Power Dispersion and an Instruction-Based At-Speed PMBIST.

Please choose a person to relate this publication to

Tae-Sik Park

Hyong-Sik Yun

Bettina Yunis

Jong-Mo Yun

Jaeman Yun

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

22.3 A 128Gb 8-High 512GB/s HBM2E DRAM with a Pseudo Quarter Bank Structure, Power Dispersion and an Instruction-Based At-Speed PMBIST.