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Disambiguation of "Jung, Seong-Ook"

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STT-MRAM Sensing Circuit With Self-Body Biasing in Deep Submicron Technologies.

, , , , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (7): 1630-1634 (2014)

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Seong-Jung Kim

Ki-Chang Seong

Seunghyeon Seong

Nak-Hyon Seong

Hong-Jae Seong

 

Other publications of authors with the same name

Pseudo NMOS based sense amplifier for high speed single-ended SRAM., , , , and . ICECS, page 331-334. IEEE, (2014)MTJ based non-volatile flip-flop in deep submicron technology., , , , , and . ISOCC, page 424-427. IEEE, (2011)An MTJ-based non-volatile flip-flop for high-performance SoC., , , , , and . I. J. Circuit Theory and Applications, 42 (4): 394-406 (2014)SRAM Design for 22-nm ETSOI Technology: Selective Cell Current Boosting and Asymmetric Back-Gate Write-Assist Circuit., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (6): 1538-1545 (2015)Bitline Precharging and Preamplifying Switching pMOS for High-Speed Low-Power SRAM., , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 63-II (11): 1059-1063 (2016)SRAM Write Assist Circuit Using Cell Supply Voltage Self-Collapse With Bitline Charge Sharing for Near-Threshold Operation., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (3): 1567-1571 (2022)A Highly Integrated Crosspoint Array Using Self-rectifying FTJ for Dual-mode Operations: CAM and PUF., , , , , , , , , and . ESSCIRC, page 113-116. IEEE, (2022)Thyristor-Based Volatile Memory in Nano-Scale CMOS., , , , , , , and . ISSCC, page 2612-2621. IEEE, (2006)Transistor sizing for reliable domino logic design in dual threshold voltage technologies., , and . ACM Great Lakes Symposium on VLSI, page 133-138. ACM, (2001)Low-swing clock domino logic incorporating dual supply and dual threshold voltages., , and . DAC, page 467-472. ACM, (2002)