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Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization.

W. Fang, S. Liu, H. Zhang, and Z. Xie. CoRR, (2024)

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Jian Xie

Yangpei Xie

Zhenwei Xie

Qian Xie

Mingliang Xie

Other publications of authors with the same name

RouteNet: routability prediction for mixed-size designs using convolutional neural network.Z. Xie, Y. Huang, G. Fang, H. Ren, S. Fang, Y. Chen, and N. Corporation. ICCAD, page 80. ACM, (2018)Robustify ML-Based Lithography Hotspot Detectors.J. Pan, C. Chang, Z. Xie, J. Hu, and Y. Chen. ICCAD, page 134:1-134:7. ACM, (2022)Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization.W. Fang, S. Liu, H. Zhang, and Z. Xie. CoRR, (2024)Accel-NASBench: Sustainable Benchmarking for Accelerator-Aware NAS.A. Ahmad, L. Du, Z. Xie, and W. Zhang. CoRR, (2024)The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models.L. Chen, Y. Chen, Z. Chu, W. Fang, T. Ho, Y. Huang, S. Khan, M. Li, X. Li, Y. Liang and 24 other author(s). CoRR, (2024)Net2: A Graph Attention Network Method Customized for Pre-Placement Net Length Estimation.Z. Xie, R. Liang, X. Xu, J. Hu, Y. Duan, and Y. Chen. CoRR, (2020)The Dark Side: Security and Reliability Concerns in Machine Learning for EDA.Z. Xie, J. Pan, C. Chang, J. Hu, and Y. Chen. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (4): 1171-1184 (April 2023)SPA-Net: A Deep Learning Approach Enhanced Using a Span-Partial Structure and Attention Mechanism for Image Copy-Move Forgery Detection.K. Zhao, X. Yuan, Z. Xie, Y. Xiang, G. Huang, and L. Feng. Sensors, 23 (14): 6430 (July 2023)Rethink before Releasing Your Model: ML Model Extraction Attack in EDA.C. Chang, J. Pan, Z. Xie, J. Hu, and Y. Chen. ASP-DAC, page 252-257. ACM, (2023)PertNAS: Architectural Perturbations for Memory-Efficient Neural Architecture Search.A. Ahmad, Z. Xie, and W. Zhang. DAC, page 1-6. IEEE, (2023)

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Disambiguation of "Xie, Zhiyao"

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Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization.

Please choose a person to relate this publication to

Jian Xie

Yangpei Xie

Zhenwei Xie

Qian Xie

Mingliang Xie

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Xie, Zhiyao"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization.

Please choose a person to relate this publication to

Jian Xie

Yangpei Xie

Zhenwei Xie

Qian Xie

Mingliang Xie

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization.