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SamurAI: A 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15, 000× Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W ML Efficiency.

I. Panades, B. Tain, J. Christmann, D. Coriat, R. Lemaire, C. Jany, B. Martineau, F. Chaix, A. Quelen, E. Pluchart, J. Noel, R. Boumchedda, A. Makosiej, M. Montoya, S. Bacles-Min, D. Briand, J. Philippe, A. Valentian, F. Heitzmann, E. Beigné, and F. Clermidy. VLSI Circuits, page 1-2. IEEE, (2020)

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Wahyudi David

Florian Bodo David

Jens-Ulrich Davids

Joachim David

Heinz David

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SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration.I. Miro-Panades, B. Tain, J. Christmann, D. Coriat, R. Lemaire, C. Jany, B. Martineau, F. Chaix, G. Waltener, E. Pluchart and 10 other author(s). IEEE J. Solid State Circuits, 58 (6): 1782-1797 (2023)A 450µW@50fps Wake-Up Module Featuring Auto-Bracketed 3-Scale Log-Corrected Pattern Recognition and Motion Detection in a 1.5Mpix 8T Global Shutter Imager.A. Verdant, W. Guicquero, D. Coriat, G. Moritz, N. Royer, S. Thuries, A. Mollard, V. Teil, Y. Desprez, G. Monnot and 7 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2024)A wide-spectrum 550-1600 nm, 16k VIS + 8 NIR pixels, high-dynamic range image-sensor for biomedical applications.L. Alacoque, D. Coriat, J. Tualle, V. Espinas, X. Alacoque, and A. Silva. ICECS, page 1-4. IEEE, (2023)Unified Power Format (UPF) methodology in a vendor independent flow.E. Garat, D. Coriat, E. Beigné, and L. Stefanazzi. PATMOS, page 82-88. IEEE, (2015)POPSTAR: a Robust Modular Optical NoC Architecture for Chiplet-based 3D Integrated Systems.Y. Thonnart, S. Bernabé, J. Charbonnier, C. Bernard, D. Coriat, C. Tortolero, P. Tissier, B. Charbonnier, S. Malhouitre, D. Saint-Patrice and 5 other author(s). DATE, page 1456-1461. IEEE, (2020)Histogram Compressive Sensing using Shuffled Cellular Automata: the TCSPC sensor use case.V. Poisson, W. Guicquero, D. Coriat, and G. Sicard. NEWCAS, page 124-128. IEEE, (2022)2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm2@ 82%-Peak-Efficiency DC-DC Converters.P. Vivet, E. Guthmuller, Y. Thonnart, G. Pillonnet, G. Moritz, I. Miro-Panades, C. Tortolero, J. Durupt, C. Bernard, D. Varreau and 18 other author(s). ISSCC, page 46-48. IEEE, (2020)SamurAI: A 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15, 000× Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W ML Efficiency.I. Panades, B. Tain, J. Christmann, D. Coriat, R. Lemaire, C. Jany, B. Martineau, F. Chaix, A. Quelen, E. Pluchart and 11 other author(s). VLSI Circuits, page 1-2. IEEE, (2020)

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Disambiguation of "Coriat, David"

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SamurAI: A 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15, 000× Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W ML Efficiency.

Please choose a person to relate this publication to

Wahyudi David

Florian Bodo David

Jens-Ulrich Davids

Joachim David

Heinz David

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Coriat, David"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML SamurAI: A 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15, 000× Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W ML Efficiency.

Please choose a person to relate this publication to

Wahyudi David

Florian Bodo David

Jens-Ulrich Davids

Joachim David

Heinz David

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
BibTeX
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Chicago
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SamurAI: A 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15, 000× Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W ML Efficiency.