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Disambiguation of "Dreps, Daniel"

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Summit and Sierra: Designing AI/HPC Supercomputers.

, , and . ISSCC, page 42-43. IEEE, (2019)

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Daniel

Daniel

Daniel Wied

Zivilprozessuale Qualifikationsprobleme im Spannungsfeld von Vertrag und Delikt: ein Beitrag zur Auslegung nationalen Zivilprozessrechts in europäischer Perspektive. Uni Regensburg, (2009)

Daniel Dirkmann

In-vitro-Untersuchungen zum Effekt von Hypothermie und Azidose auf Variablen thrombelastometrischer Messungen der Blutgerinnung. Uni Duisburg-Essen, (2009)

Daniel Stanze

Systematische Analyse von Rezeptoren und Effektormechanismen der pulmonalen angeborenen Immunität. Uni Marburg, (2009)
 

Other publications of authors with the same name

3.1 POWER9™: A processor family optimized for cognitive computing with 25Gb/s accelerator links and 16Gb/s PCIe Gen4., , , , , , , , , and 4 other author(s). ISSCC, page 50-51. IEEE, (2017)Summit and Sierra: Designing AI/HPC Supercomputers., , and . ISSCC, page 42-43. IEEE, (2019)POWER10™: A 16-Core SMT8 Server Processor With 2TB/s Off-Chip Bandwidth in 7nm Technology., , , , , , , , , and 2 other author(s). ISSCC, page 48-50. IEEE, (2022)4.1 22nm Next-generation IBM System z microprocessor., , , , , , , , , and 21 other author(s). ISSCC, page 1-3. IEEE, (2015)The IBM POWER7 HUB module: A terabyte interconnect switch for high-performance computer systems., , , , , and . Hot Chips Symposium, page 1-33. IEEE, (2010)A 4.5mW/Gb/s 6.4Gb/s 22+1-lane source-synchronous link rx core with optional cleanup PLL in 65nm CMOS., , , , , , and . ISSCC, page 160-161. IEEE, (2010)The 12-Core POWER8™ Processor With 7.6 Tb/s IO Bandwidth, Integrated Voltage Regulation, and Resonant Clocking., , , , , , , , , and 20 other author(s). IEEE J. Solid State Circuits, 50 (1): 10-23 (2015)A 25×50Gb/s 2.22pJ/b NRZ RX with Dual-Bank and 3-Tap Speculative DFE for Microprocessor Application in 7nm FinFET CMOS., , , , , , , , , and 12 other author(s). VLSI Circuits, page 1-2. IEEE, (2020)How server designs will change as interface bandwidth demands continue to increase.. OFC, page 1. IEEE, (2015)5.1 POWER8TM: A 12-core server-class processor in 22nm SOI with 7.6Tb/s off-chip bandwidth., , , , , , , , , and 10 other author(s). ISSCC, page 96-97. IEEE, (2014)