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UniWiG: Unified Winograd-GEMM Architecture for Accelerating CNN on FPGAs.

S. Kala, J. Mathew, B. Jose, and N. Sivanandan. VLSID, page 209-214. IEEE, (2019)

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Energy Aware Synthesis of Application Kernels Expressed in Functional Languages on a Coarse Grained Composable Reconfigurable Array.N. Sivanandan, K. Madhu, S. Das, S. Nandy, and R. Narayan. iNIS, page 7-12. IEEE, (2015)Two dimensional FFT architecture based on radix-43 algorithm with efficient output reordering.S. Kala, N. Sivanandan, B. Jose, J. Mathew, and M. Ottavi. DTIS, page 1-2. IEEE, (2018)Micro-architectural Enhancements in Distributed Memory CGRAs for LU and QR Factorizations.F. Merchant, A. Maity, M. Mahadurkar, K. Vatwani, I. Munje, M. C, N. Sivanandan, N. Gopalan, S. Raha, S. Nandy and 1 other author(s). VLSID, page 153-158. IEEE Computer Society, (2015)Efficient Hardware Acceleration of Convolutional Neural Networks.S. Kala, B. Jose, J. Mathew, and N. Sivanandan. SoCC, page 191-192. IEEE, (2019)Synthesis of Instruction Extensions on HyperCell, a reconfigurable datapath.K. Madhu, S. Das, M. C, N. Sivanandan, S. Nandy, and R. Narayan. ICSAMOS, page 215-224. IEEE, (2014)A Hardware-Software Co-design based Approach for Development of a Distributed DAQ System using FPGA.A. Krishnan, M. Supriya, and N. Sivanandan. VDAT, page 1-6. IEEE, (2021)UniWiG: Unified Winograd-GEMM Architecture for Accelerating CNN on FPGAs.S. Kala, J. Mathew, B. Jose, and N. Sivanandan. VLSID, page 209-214. IEEE, (2019)Design Space Exploration of Convolution Algorithms to Accelerate CNNs on FPGA.S. Kala, D. Paul, B. Jose, and N. Sivanandan. ISED, page 21-25. IEEE, (2018)Energy Efficient, Scalable, and Dynamically Reconfigurable FFT Architecture for OFDM Systems.S. Kala, N. Sivanandan, S. Nandy, and R. Narayan. ISED, page 20-24. IEEE Computer Society, (2014)Hardware Acceleration of SpMV Multiplier for Deep Learning.M. Mahadurkar, N. Sivanandan, and S. Kala. VDAT, page 1-6. IEEE, (2021)

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Disambiguation of "Sivanandan, Nalesh"

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UniWiG: Unified Winograd-GEMM Architecture for Accelerating CNN on FPGAs.

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Disambiguation of "Sivanandan, Nalesh"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML UniWiG: Unified Winograd-GEMM Architecture for Accelerating CNN on FPGAs.

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UniWiG: Unified Winograd-GEMM Architecture for Accelerating CNN on FPGAs.