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Disambiguation of "Ling, Andrew C."

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Challenges/Opportunities to Enable Dependable Scale-out System with Groq Deterministic Tensor-Streaming Processors.

, , , , , , and . DSN (Supplements), page 19-22. IEEE, (2022)

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Andrew C Brunson

Andrew C Oates

Andrew C Rouse

Dchi-ling Ling

Paul Ling

 

Other publications of authors with the same name

Challenges/Opportunities to Enable Dependable Scale-out System with Groq Deterministic Tensor-Streaming Processors., , , , , , and . DSN (Supplements), page 19-22. IEEE, (2022)FPGA PLB Evaluation using Quantified Boolean Satisfiability., , and . FPL, page 19-24. IEEE, (2005)Harnessing Numerical Flexibility for Deep Learning on FPGAs., , , , , , , , , and 1 other author(s). HEART, page 1:1-1:3. ACM, (2018)Harnessing the Power of FPGAs with the Intel FPGA SDK for OpenCL™., , and . IWOCL, page 19:1. ACM, (2017)BddCut: Towards Scalable Symbolic Cut Enumeration., , and . ASP-DAC, page 408-413. IEEE Computer Society, (2007)In-Package Domain-Specific ASICs for Intel® Stratix® 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC., , , , , , , , , and 1 other author(s). FPL, page 106-110. IEEE Computer Society, (2018)DLA: Compiler and FPGA Overlay for Neural Network Inference Acceleration., , , , , , , , , and 1 other author(s). FPL, page 411-418. IEEE Computer Society, (2018)FPGA technology mapping: a study of optimality., , and . DAC, page 427-432. ACM, (2005)An OpenCL™ Deep Learning Accelerator on Arria 10., , , , and . FPGA, page 55-64. ACM, (2017)Harnessing the power of FPGAs using altera's OpenCL compiler., , and . FPGA, page 5-6. ACM, (2013)