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Disambiguation of "Mazzanti, Andrea"

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A low-noise programmable-gain amplifier for 25 Gb/s multi-mode fiber receivers in 28nm CMOS FDSOI.

, , , , and . ESSCIRC, page 160-163. IEEE, (2015)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Elena Mazzanti

Andrea Witzenrath

Risikofaktoren für abdominelle Komplikationen nach kardiopulmonalem Bypass. Uni Erlangen-Nürnberg, (2009)

Andrea Rottach

Analysis of the cell cycle dependent dynamics of Dnmt1 and Np95 in living cells. Uni München, (2009)

Andrea Hruby

Die MAPKKK Bck1p des Zellwand-Integritätssignalwegs in der Bäckerhefe Saccharomyces cerevisiae. Uni Münster, (2009)

Michaela Andrea Fingas

Resultate nach radikaler Prostatektomie bei Patienten mit einem Prostatakarzinom Gleason 7-10. Uni Marburg, (2009)
 

Other publications of authors with the same name

A 1.4mW 4.90-to-5.65GHz Class-C CMOS VCO with an Average FoM of 194.5dBc/Hz., and . ISSCC, page 474-475. IEEE, (2008)RF building blocks., and . CICC, page 1. IEEE, (2013)A mm-Wave quadrature VCO based on magnetically coupled resonators., , , , and . ISSCC, page 280-282. IEEE, (2011)A 90Vpp 720MHz GBW linear power amplifier for ultrasound imaging transmitters in BCD6-SOI., , , and . ISSCC, page 370-372. IEEE, (2012)40GHz Frequency Tripler with High Fundamental and Harmonics Rejection in 55nm SiGe-BiCMOS., , and . ESSCIRC, page 229-232. IEEE, (2019)Acquisition RX Chain for PMUT-Based Highly Integrated Ultrasound Imaging Systems., , , , and . PRIME, page 333-336. IEEE, (2022)A Magnetically Coupled Dual-Core 154-GHz Class-F Oscillator with -177.1 FoM and -87 dBc/Hz PN at 1-MHz Offset in a 22-nm FDSOI with Third-Harmonic Extraction., , , and . VLSI Technology and Circuits, page 12-13. IEEE, (2022)A 25mW Highly Linear Continuous-Time FIR Equalizer for 25Gb/s Serial Links in 28-nm CMOS., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (7): 1903-1913 (2017)A Low-Noise Design Technique for High-Speed CMOS Optical Receivers., , , , , , and . IEEE J. Solid State Circuits, 49 (6): 1437-1447 (2014)8.3 A power-scalable 7-tap FIR equalizer with tunable active delay line for 10-to-25Gb/s multi-mode fiber EDC in 28nm LP-CMOS., , , , , , and . ISSCC, page 142-143. IEEE, (2014)