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Tunnel FET Current Mode Logic for DPA-Resilient Circuit Designs.

, , , , , and . IEEE Trans. Emerg. Top. Comput., 5 (3): 340-352 (2017)

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Efficient sensitivity-based capacitance modeling for systematic and random geometric variations., , and . ASP-DAC, page 61-66. IEEE, (2011)Entropy-Based Modeling for Estimating Adversarial Bit-flip Attack Impact on Binarized Neural Network., , , and . ASP-DAC, page 493-498. ACM, (2021)HARDeNN: Hardware-assisted attack-resilient deep neural network architectures., , , , and . Microprocess. Microsystems, (November 2022)Leveraging Emerging Technology for Hardware Security - Case Study on Silicon Nanowire FETs and Graphene SymFETs., , , , , and . ATS, page 342-347. IEEE Computer Society, (2014)Reliable and high performance STT-MRAM architectures based on controllable-polarity devices., , , , , and . ICCD, page 343-350. IEEE Computer Society, (2015)Tunnel FET Current Mode Logic for DPA-Resilient Circuit Designs., , , , , and . IEEE Trans. Emerg. Top. Comput., 5 (3): 340-352 (2017)Fiji-FIN: A Fault Injection Framework on Quantized Neural Network Inference Accelerator., , , and . ICMLA, page 1139-1144. IEEE, (2020)Leverage Emerging Technologies For DPA-Resilient Block Cipher Design., , , , and . DATE, page 1538-1543. IEEE, (2016)Robust Self-Learning Physical Layer Abstraction Utilizing Optical Performance Monitoring and Markov Chain Monte Carlo., , , , , , and . ECOC, page 1-3. IEEE, (2017)Cooperative Distributed MISO Wireless Relay Networks Under Jamming Environments with Power Constraints., , , , and . CICSyN, page 84-88. IEEE Computer Society, (2011)