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Disambiguation of "Bi, Yu"

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Reliable and high performance STT-MRAM architectures based on controllable-polarity devices.

, , , , , and . ICCD, page 343-350. IEEE Computer Society, (2015)

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Bi Yu

Yü-Bi Dschou

Hongguang Bi

Bi Wu

Shasha Bi

 

Other publications of authors with the same name

Tunnel FET Current Mode Logic for DPA-Resilient Circuit Designs., , , , , and . IEEE Trans. Emerg. Top. Comput., 5 (3): 340-352 (2017)Fiji-FIN: A Fault Injection Framework on Quantized Neural Network Inference Accelerator., , , and . ICMLA, page 1139-1144. IEEE, (2020)Robust Self-Learning Physical Layer Abstraction Utilizing Optical Performance Monitoring and Markov Chain Monte Carlo., , , , , , and . ECOC, page 1-3. IEEE, (2017)Leverage Emerging Technologies For DPA-Resilient Block Cipher Design., , , , and . DATE, page 1538-1543. IEEE, (2016)Noncooperative Distributed MMSE Schemes for AF SIMO Wireless Relay Networks., , , , and . CICSyN, page 89-94. IEEE Computer Society, (2011)Cooperative Distributed MISO Wireless Relay Networks Under Jamming Environments with Power Constraints., , , , and . CICSyN, page 84-88. IEEE Computer Society, (2011)Field Trial of Monitoring On-Demand at Intermediate-Nodes Through Bayesian Optimization., , , , , , , , and . OFC, page 1-3. IEEE, (2018)Enhancing Hardware Security with Emerging Transistor Technologies., , , , , and . ACM Great Lakes Symposium on VLSI, page 305-310. ACM, (2016)Exploiting the Vulnerability of Large Language Models via Defense-Aware Architectural Backdoor., and . CoRR, (2024)Entropy-Based Modeling for Estimating Adversarial Bit-flip Attack Impact on Binarized Neural Network., , , and . ASP-DAC, page 493-498. ACM, (2021)