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Automatic High-Level Data-Flow Synthesis and Optimization of Polynomial Datapaths Using Functional Decomposition., , , and . IEEE Trans. Computers, 64 (6): 1579-1593 (2015)On variable ordering of binary decision diagrams for the application of multi-level logic synthesis., , and . EURO-DAC, page 50-54. EEE Computer Society, (1991)Early case splitting and false path detection to improve high level ATPG techniques., and . ISCAS, page 1463-1466. IEEE, (2011)A new approach for selecting inputs of logic functions during debug., and . ISQED, page 166-173. IEEE, (2017)Multiple Error Diagnosis Based on Xlists., , , , and . DAC, page 660-665. ACM Press, (1999)Efficient Sum-to-One Subsets Algorithm for Logic Optimization., and . DAC, page 443-448. IEEE Computer Society Press, (1992)Test pattern generation for multiple stuck-at faults not covered by test patterns for single faults., , , and . ISCAS, page 1-4. IEEE, (2017)Lateral State Prediction for Automated Steering using Reliability-Weighted Measurements from Multiple Sensors., , and . ITSC, page 461-466. IEEE, (2007)Interconnect-aware Pipeline Synthesis for Array based Reconfigurable Architectures., , , and . IESS, volume 231 of IFIP Advances in Information and Communication Technology, page 121-134. Springer, (2007)Object-oriented analysis and design of hardware/software co-designs with dependence analysis for design reuse., , and . IRI, page 318-325. IEEE Systems, Man, and Cybernetics Society, (2005)