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Single-Event Upset Responses of Dual- and Triple-Well D Flip-Flop Designs in 7-nm Bulk FinFET Technology.

L. Xu, J. Cao, B. Bhuva, I. Chatterjee, S. Wen, R. Wong, and L. Massengill. IRPS, page 1-5. IEEE, (2019)

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Wen-Jie Dai

Zhou Jie

Yucheng Jie

Jie Ding

Jie Huang

Other publications of authors with the same name

Performance, metastability and soft-error robustness tradeoffs for flip-flops in 40nm CMOS.D. Rennie, D. Li, M. Sachdev, B. Bhuva, S. Jagannathan, S. Wen, and R. Wong. CICC, page 1-4. IEEE, (2011)Placement of repair circuits for in-field FPGA repair.M. Wirthlin, J. Jensen, A. Wilson, W. Howes, S. Wen, and R. Wong. FPGA, page 115-124. ACM, (2013)IZIP: In-place zero overhead interconnect protection via PIP redundancy.Y. Luo, A. Evans, S. Wen, R. Wong, and G. Chen. ASICON, page 565-568. IEEE, (2017)Soft Error Characterization of D-FFs at the 5-nm Bulk FinFET Technology for the Terrestrial Environment.Y. Xiong, A. Feeley, N. Pieper, D. Ball, B. Narasimham, J. Brockman, N. Dodds, S. Wender, S. Wen, R. Fung and 1 other author(s). IRPS, page 7. IEEE, (2022)Temperature Dependence of Single-Event Transient Pulse Widths for 7-nm Bulk FinFET Technology.J. Cao, L. Xu, S. Wen, R. Fung, B. Narasimham, L. Massengill, and B. Bhuva. IRPS, page 1-5. IEEE, (2020)Variation of SRAM Alpha-Induced Soft Error Rate with Technology Node.D. Leroy, R. Gaillard, E. Schäfer, C. Beltrando, S. Wen, and R. Wong. IOLTS, page 253-257. IEEE Computer Society, (2008)A Systematical Method of Quantifying SEU FIT.S. Wen, D. Alexandrescu, and R. Perez. IOLTS, page 109-114. IEEE Computer Society, (2008)RIIF - Reliability information interchange format.A. Evans, M. Nicolaidis, S. Wen, D. Alexandrescu, and E. Costenaro. IOLTS, page 103-108. IEEE Computer Society, (2012)Total-Ionizing Dose Damage from X-Ray PCB Inspection Systems.N. Pieper, M. Chun, Y. Xiong, H. Dattilo, J. Kronenberg, S. Baeg, S. Wen, R. Fung, D. Chan, C. Escobar and 1 other author(s). IRPS, page 1-7. IEEE, (2024)Traffic Anomaly Detection Via Conditional Normalizing Flow.Z. Kang, A. Mukhopadhyay, A. Gokhale, S. Wen, and A. Dubey. ITSC, page 2563-2570. IEEE, (2022)

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Disambiguation of "Wen, Shi-Jie"

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Single-Event Upset Responses of Dual- and Triple-Well D Flip-Flop Designs in 7-nm Bulk FinFET Technology.

Please choose a person to relate this publication to

Wen-Jie Dai

Zhou Jie

Yucheng Jie

Jie Ding

Jie Huang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Wen, Shi-Jie"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Single-Event Upset Responses of Dual- and Triple-Well D Flip-Flop Designs in 7-nm Bulk FinFET Technology.

Please choose a person to relate this publication to

Wen-Jie Dai

Zhou Jie

Yucheng Jie

Jie Ding

Jie Huang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

Single-Event Upset Responses of Dual- and Triple-Well D Flip-Flop Designs in 7-nm Bulk FinFET Technology.