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Disambiguation of "Massengill, Lloyd W."

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Single-Event Upset Responses of Dual- and Triple-Well D Flip-Flop Designs in 7-nm Bulk FinFET Technology.

, , , , , , and . IRPS, page 1-5. IEEE, (2019)

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Martyn Lloyd-Kelly

Rhys Lloyd

Lloyd Windrim

David Lloyd Briggs

Nelson Lloyd Brock

 

Other publications of authors with the same name

Frequency, LET, and Supply Voltage Dependence of Logic Soft Errors at the 7-nm Node., , , , , and . IRPS, page 1-5. IEEE, (2021)Evaluation on flip-flop physical unclonable functions in a 14/16-nm bulk FinFET technology., , , , , , , and . IRPS, page 1. IEEE, (2018)Single-Event Upset Responses of Dual- and Triple-Well D Flip-Flop Designs in 7-nm Bulk FinFET Technology., , , , , , and . IRPS, page 1-5. IEEE, (2019)Alpha Particle Soft-Error Rates for D-FF Designs in 16-Nm and 7-Nm Bulk FinFET Technologies., , , , , , and . IRPS, page 1-5. IEEE, (2019)Multi-cell soft errors at the 16-nm FinFET technology node., , , , , , and . IRPS, page 4. IEEE, (2015)Weight decay and resolution effects in feedforward artificial neural networks., and . IEEE Trans. Neural Networks, 2 (1): 168-170 (1991)Impact of supply voltage and particle LET on the soft error rate of logic circuits., , , , , , and . IRPS, page 4. IEEE, (2018)Designing soft-error-aware circuits with power and speed optimization., , , , and . IRPS, page 5-1. IEEE, (2018)Temperature Dependence of Single-Event Transient Pulse Widths for 7-nm Bulk FinFET Technology., , , , , , and . IRPS, page 1-5. IEEE, (2020)