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Thermal resistance measurements of interconnections for a three-dimensional (3D) chip stack.

, , , and . 3DIC, page 1-5. IEEE, (2009)

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Thermal design guideline and new cooling solution for a three-dimensional (3D) chip stack., , , , , , , , , and 1 other author(s). 3DIC, page 1-8. IEEE, (2013)Thermal stress analysis of die stacks with fine-pitch IMC interconnections for 3D integration., , , , , , , , and . 3DIC, page 1-7. IEEE, (2011)Thermal resistance measurements of interconnections for a three-dimensional (3D) chip stack., , , and . 3DIC, page 1-5. IEEE, (2009)Turning the Finger into a Writing Tool., , , , and . EMBC, page 1239-1242. IEEE, (2019)Chip-level TSV integration for rapid prototyping of 3D system LSIs., , , , , , , , and . 3DIC, page 1-4. IEEE, (2011)10 µm fine pitch Cu/Sn micro-bumps for 3-D super-chip stack., , , , , , , , , and . 3DIC, page 1-6. IEEE, (2009)High density 3D integration by pre-applied Inter Chip Fill., , , , , , , , and . 3DIC, page 1-5. IEEE, (2010)Back to Finger-Writing: Fingertip Writing Technology Based on Pressure Sensing., , , and . IEEE Access, (2020)Low temperature Au-Au bonding with VUV/O3 treatment., , , , , , , and . 3DIC, page 1-5. IEEE, (2011)