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8-b Precision 8-Mb ReRAM Compute-in-Memory Macro Using Direct-Current-Free Time-Domain Readout Scheme for AI Edge Devices.

J. Hung, T. Wen, Y. Huang, S. Huang, F. Chang, C. Su, W. Khwa, C. Lo, R. Liu, C. Hsieh, K. Tang, Y. Chih, T. Chang, and M. Chang. IEEE J. Solid State Circuits, 58 (1): 303-315 (2023)

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Yeong-chin Su

I-hsin Su

Zoran Su i

Elion Chin

Erika Chin

Other publications of authors with the same name

An 8-Mb DC-Current-Free Binary-to-8b Precision ReRAM Nonvolatile Computing-in-Memory Macro using Time-Space-Readout with 1286.4-21.6TOPS/W for Edge-AI Devices.J. Hung, Y. Huang, S. Huang, F. Chang, T. Wen, C. Su, W. Khwa, C. Lo, R. Liu, C. Hsieh and 4 other author(s). ISSCC, page 1-3. IEEE, (2022)A 28nm Nonvolatile AI Edge Processor using 4Mb Analog-Based Near-Memory-Compute ReRAM with 27.2 TOPS/W for Tiny AI Edge Devices.T. Wen, J. Hung, H. Hsu, Y. Wu, F. Chang, C. Li, C. Chien, C. Su, W. Khwa, J. Wu and 8 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)8-b Precision 8-Mb ReRAM Compute-in-Memory Macro Using Direct-Current-Free Time-Domain Readout Scheme for AI Edge Devices.J. Hung, T. Wen, Y. Huang, S. Huang, F. Chang, C. Su, W. Khwa, C. Lo, R. Liu, C. Hsieh and 4 other author(s). IEEE J. Solid State Circuits, 58 (1): 303-315 (2023)A 22nm 4Mb 8b-Precision ReRAM Computing-in-Memory Macro with 11.91 to 195.7TOPS/W for Tiny AI Edge Devices.C. Xue, J. Hung, H. Kao, Y. Huang, S. Huang, F. Chang, P. Chen, T. Liu, C. Jhang, C. Su and 8 other author(s). ISSCC, page 245-247. IEEE, (2021)Logic Process Compatible 40nm 256K×144 Embedded RRAM with Low Voltage Current Limiter and Ambient Compensation Scheme to Improve the Read Window.C. Lai, C. Chou, C. Weng, Z. Lin, P. Tseng, C. Wang, C. Wang, C. Su, W. Chen, Y. Lin and 4 other author(s). A-SSCC, page 13-16. IEEE, (2018)An All-Weights-on-Chip DNN Accelerator in 22nm ULL Featuring 24×1 Mb eRRAM.Z. Wang, Z. Li, L. Xu, Q. Dong, C. Su, W. Chu, G. Tsou, Y. Chih, T. Chang, D. Sylvester and 2 other author(s). VLSI Circuits, page 1-2. IEEE, (2020)A fast readout circuit for an organic vertical nano-junction sensor.T. Tran, P. Chao, C. Su, and H. Zan. IEEE SENSORS, page 1-3. IEEE, (2016)

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Disambiguation of "Su, Chin-I"

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8-b Precision 8-Mb ReRAM Compute-in-Memory Macro Using Direct-Current-Free Time-Domain Readout Scheme for AI Edge Devices.

Please choose a person to relate this publication to

Yeong-chin Su

I-hsin Su

Zoran Su i

Elion Chin

Erika Chin

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Su, Chin-I"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 8-b Precision 8-Mb ReRAM Compute-in-Memory Macro Using Direct-Current-Free Time-Domain Readout Scheme for AI Edge Devices.

Please choose a person to relate this publication to

Yeong-chin Su

I-hsin Su

Zoran Su i

Elion Chin

Erika Chin

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

8-b Precision 8-Mb ReRAM Compute-in-Memory Macro Using Direct-Current-Free Time-Domain Readout Scheme for AI Edge Devices.