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A Near-Threshold Cell-Based All-Digital PLL with Hierarchical Band-Selection G-DCO for Fast Lock-In and Low-Power Applications.

C. Chang, Y. Chu, and S. Jou. IEICE Trans. Electron., 98-C (8): 882-891 (2015)

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Hua Yuan

Chi-Hua Chu

Chia-hua Chu

Fang Yuan

Lei Yuan

Other publications of authors with the same name

Low-Voltage Low-Power CMOS True-Single-Phase Clocking Scheme with Locally Asynchronous Logic Circuits.H. Huang, J. Wang, Y. Chu, T. Wu, K. Cheng, and C. Wu. ISCAS, page 1572-1575. IEEE, (1995)PVT-aware digital controlled voltage regulator design for ultra-low-power (ULP) DVFS systems.P. Wu, Y. Kuo, C. Wu, C. Chuang, Y. Chu, and W. Hwang. SoCC, page 136-139. IEEE, (2014)Collaborative voltage scaling with online STA and variable-latency datapath.T. Lin, P. Hsiao, C. Lin, S. Kuo, C. Lin, Y. Kuo, C. Liu, and Y. Chu. ACM Great Lakes Symposium on VLSI, page 347-352. ACM, (2010)Design of STR level converters for SoCs using the multi-island dual-VDD design technique.J. Wang, Y. Chang, C. Yeh, and Y. Chu. ISCAS, IEEE, (2006)An energy-efficient level converter with high thermal variation immunity for sub-threshold to super-threshold operation.M. Chen, M. Chang, Y. Chu, and W. Hwang. SoCC, page 5-10. IEEE, (2012)A 3 MHz-to-1.8 GHz 94 μW-to-9.5 mW 0.0153-mm2 all-digital delay-locked loop in 65-nm CMOS.C. Cheng, J. Wang, P. Chou, S. Chen, C. Sun, Y. Chu, and T. Yang. A-SSCC, page 361-364. IEEE, (2014)Energy-efficient RISC design with on-demand circuit-level timing speculation.T. Lin, Y. Kuo, Y. Tsai, T. Shyu, and Y. Chu. ASP-DAC, page 477-478. IEEE, (2012)An ultra-low power interface CMOS IC design for biosensor applications.W. Hu, Y. Liu, V. Das, C. Schecht, T. Nguyen, D. Lie, T. Yan, C. Kuo, S. Wu, Y. Chu and 1 other author(s). MWSCAS, page 1196-1199. IEEE, (2012)A 0.48V 0.57nJ/pixel video-recording SoC in 65nm CMOS.T. Lin, C. Chien, P. Chang, C. Chen, P. Wang, T. Shyu, C. Chou, S. Luo, J. Guo, T. Chen and 8 other author(s). ISSCC, page 158-159. IEEE, (2013)A dual-edged triggered explicit-pulsed level converting flip-flop with a wide operation range.M. Chen, M. Chang, P. Wu, Y. Kuo, C. Yang, Y. Chu, and W. Hwang. SoCC, page 92-97. IEEE, (2013)

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Disambiguation of "Chu, Yuan-Hua"

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A Near-Threshold Cell-Based All-Digital PLL with Hierarchical Band-Selection G-DCO for Fast Lock-In and Low-Power Applications.

Please choose a person to relate this publication to

Hua Yuan

Chi-Hua Chu

Chia-hua Chu

Fang Yuan

Lei Yuan

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Chu, Yuan-Hua"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A Near-Threshold Cell-Based All-Digital PLL with Hierarchical Band-Selection G-DCO for Fast Lock-In and Low-Power Applications.

Please choose a person to relate this publication to

Hua Yuan

Chi-Hua Chu

Chia-hua Chu

Fang Yuan

Lei Yuan

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
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URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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A Near-Threshold Cell-Based All-Digital PLL with Hierarchical Band-Selection G-DCO for Fast Lock-In and Low-Power Applications.