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Computational memory-based inference and training of deep neural networks.

A. Sebastian, I. Boybat, M. Dazzi, I. Giannopoulos, V. Jonnalagadda, V. Joshi, G. Karunaratne, B. Kersting, R. Khaddam-Aljameh, S. Nandakumar, A. Petropoulos, C. Piveteau, T. Antonakopoulos, B. Rajendran, M. Gallo, and E. Eleftheriou. VLSI Circuits, page 168-. IEEE, (2019)

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Pasan Karunaratne

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In-memory Vector Symbolic Architectures.G. Karunaratne. ETH Zurich, Zürich, Switzerland, (2023)base-search.net (ftethz:oai:www.research-collection.ethz.ch:20.500.11850/625319).Real-time Language Recognition using Hyperdimensional Computing on Phase-change Memory Array.G. Karunaratne, A. Rahimi, M. Gallo, G. Cherubini, and A. Sebastian. AICAS, page 1. IEEE, (2021)Wireless On-Chip Communications for Scalable In-memory Hyperdimensional Computing.R. Guirado, A. Rahimi, G. Karunaratne, E. Alarcón, A. Sebastian, and S. Abadal. IJCNN, page 1-8. IEEE, (2022)Architecting more than Moore: wireless plasticity for massive heterogeneous computer architectures (WiPLASH).J. Klein, A. Levisse, G. Ansaloni, D. Atienza, M. Zapater, M. Dazzi, G. Karunaratne, I. Boybat, A. Sebastian, D. Rossi and 12 other author(s). CF, page 191-193. ACM, (2021)RETRO-LI: Small-Scale Retrieval Augmented Generation Supporting Noisy Similarity Searches and Domain Shift Generalization.G. Rashiti, G. Karunaratne, M. Sachan, A. Sebastian, and A. Rahimi. ECAI, volume 392 of Frontiers in Artificial Intelligence and Applications, page 2974-2982. IOS Press, (2024)Deep learning acceleration based on in-memory computing.E. Eleftheriou, M. Gallo, S. Nandakumar, C. Piveteau, I. Boybat, V. Joshi, R. Khaddam-Aljameh, M. Dazzi, I. Giannopoulos, G. Karunaratne and 7 other author(s). IBM J. Res. Dev., 63 (6): 7:1-7:16 (2019)HERMES Core - A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing.R. Khaddam-Aljameh, M. Stanisavljevic, J. Mas, G. Karunaratne, M. Braendli, F. Liu, A. Singh, S. Müller, U. Egger, A. Petropoulos and 14 other author(s). VLSI Circuits, page 1-2. IEEE, (2021)ESSOP: Efficient and Scalable Stochastic Outer Product Architecture for Deep Learning.V. Joshi, G. Karunaratne, M. Gallo, I. Boybat, C. Piveteau, A. Sebastian, B. Rajendran, and E. Eleftheriou. ISCAS, page 1-5. IEEE, (2020)Constrained Few-shot Class-incremental Learning.M. Hersche, G. Karunaratne, G. Cherubini, L. Benini, A. Sebastian, and A. Rahimi. CVPR, page 9047-9057. IEEE, (2022)Decoding Superpositions of Bound Symbols Represented by Distributed Representations.M. Hersche, Z. Opala, G. Karunaratne, A. Sebastian, and A. Rahimi. NeSy, volume 3432 of CEUR Workshop Proceedings, page 279-288. CEUR-WS.org, (2023)

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Computational memory-based inference and training of deep neural networks.

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Pasan Karunaratne

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Disambiguation of "Karunaratne, Geethan"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Computational memory-based inference and training of deep neural networks.

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Pasan Karunaratne

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Computational memory-based inference and training of deep neural networks.