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11.3 Metis AIPU: A 12nm 15TOPS/W 209.6TOPS SoC for Cost- and Energy-Efficient Inference at the Edge., , , , , , , , , и 38 other автор(ы). ISSCC, стр. 212-214. IEEE, (2024)Computational memory-based inference and training of deep neural networks., , , , , , , , , и 6 other автор(ы). VLSI Circuits, стр. 168-. IEEE, (2019)Accelerating Inference of Convolutional Neural Networks Using In-memory Computing., , , и . Frontiers Comput. Neurosci., (2021)Graphene-Based Wireless Agile Interconnects for Massive Heterogeneous Multi-Chip Processors., , , , , , , , , и 11 other автор(ы). IEEE Wirel. Commun., 30 (4): 162-169 (августа 2023)Graphene-based Wireless Agile Interconnects for Massive Heterogeneous Multi-chip Processors., , , , , , , , , и 11 other автор(ы). CoRR, (2020)Compiling Neural Networks for a Computational Memory Accelerator., , , , , и . CoRR, (2020)Accelerating Inference of CNNs with In-Memory Computing.. ETH Zurich, Zürich, Switzerland, (2021)base-search.net (ftethz:oai:www.research-collection.ethz.ch:20.500.11850/540786).A 100Gb/s 1.1pJ/b PAM-4 RX with Dual-Mode 1-Tap PAM-4 / 3-Tap NRZ Speculative DFE in 14nm CMOS FinFET., , , , , , , , , и 1 other автор(ы). ISSCC, стр. 112-114. IEEE, (2019)Deep learning acceleration based on in-memory computing., , , , , , , , , и 7 other автор(ы). IBM J. Res. Dev., 63 (6): 7:1-7:16 (2019)A simple and fast tool for the modelling of inter-symbol interference and equalization in high-speed chip-to-chip interfaces., , , , , , , , , и . MIPRO, стр. 112-116. IEEE, (2019)