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Disambiguation of "Ishihara, Tohru"

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Neural Network Calculations at the Speed of Light Using Optical Vector-Matrix Multiplication and Optoelectronic Activation.

, , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 104-A (11): 1477-1487 (2021)

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Tohru Iwai

Aeka Ishihara

Hirofumi Ishihara

 

Other publications of authors with the same name

Performance Modeling of VIA-Switch FPGA for Device-Circuit-Architecture Co-Optimization., , and . SoCC, page 112-117. IEEE, (2018)Maximizing Energy Efficiency of on-Chip Caches Exploiting Hybrid Memory Structure., , , and . PATMOS, page 237-242. IEEE, (2018)Power-Pro: Programmable Power Management Architecture., and . ASP-DAC, page 321-322. IEEE, (1998)Microarchitectural-level statistical timing models for near-threshold circuit design., , and . ASP-DAC, page 87-93. IEEE, (2015)Minimizing inter-task interferences in scratch-pad memory usage for reducing the energy consumption of multi-task systems., , , , and . CASES, page 157-166. ACM, (2010)Value-dependence of SRAM leakage in deca-nanometer technologies., and . IEICE Electron. Express, 5 (1): 23-28 (2008)An energy-efficient on-chip memory structure for variability-aware near-threshold operation., , and . ISQED, page 23-28. IEEE, (2015)An Accuracy Reconfigurable Vector Accelerator Based on Approximate Logarithmic Multipliers., , and . ASP-DAC, page 568-573. IEEE, (2022)An Efficient Fault Injection Algorithm for Identifying Unimportant FFs in Approximate Computing Circuits., , and . DATE, page 1-2. IEEE, (2023)A Power Minimization Technique for Arithmetic Circuits by Cell Selection., , , and . ASP-DAC/VLSI Design, page 268-273. IEEE Computer Society, (2002)