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Disambiguation of "Biagioni, Andrea"

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LO-FA-MO: Fault Detection and Systemic Awareness for the QUonG Computing System.

, , , , , , , , , and . SRDS, page 265-270. IEEE Computer Society, (2014)

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Andrea Witzenrath

Risikofaktoren für abdominelle Komplikationen nach kardiopulmonalem Bypass. Uni Erlangen-Nürnberg, (2009)

Andrea Rottach

Analysis of the cell cycle dependent dynamics of Dnmt1 and Np95 in living cells. Uni München, (2009)

Andrea Hruby

Die MAPKKK Bck1p des Zellwand-Integritätssignalwegs in der Bäckerhefe Saccharomyces cerevisiae. Uni Münster, (2009)

Michaela Andrea Fingas

Resultate nach radikaler Prostatektomie bei Patienten mit einem Prostatakarzinom Gleason 7-10. Uni Marburg, (2009)

Andrea Calker

 

Other publications of authors with the same name

Design and implementation of a modular, low latency, fault-aware, FPGA-based network interface., , , , , , , , , and . ReConFig, page 1-6. IEEE, (2013)Distributed simulation of polychronous and plastic spiking neural networks: strong and weak scaling of a representative mini-application benchmark executed on a small-scale commodity cluster., , , , , , , , , and . CoRR, (2013)Real-Time Cortical Simulations: Energy and Interconnect Scaling on Distributed Systems., , , , , , , , , and 4 other author(s). PDP, page 283-290. IEEE, (2019)NaNet: a flexible and configurable low-latency NIC for real-time trigger systems based on GPUs., , , , , , , , , and 3 other author(s). CoRR, (2013)Virtual-to-Physical address translation for an FPGA-based interconnect with host and GPU remote DMA capabilities., , , , , , , , , and . FPT, page 58-65. IEEE, (2013)LO-FA-MO: Fault Detection and Systemic Awareness for the QUonG Computing System., , , , , , , , , and . SRDS, page 265-270. IEEE Computer Society, (2014)The Brain on Low Power Architectures - Efficient Simulation of Cortical Slow Waves and Asynchronous States., , , , , , , , , and 3 other author(s). PARCO, volume 32 of Advances in Parallel Computing, page 760-769. IOS Press, (2017)GPU Peer-to-Peer Techniques Applied to a Cluster Interconnect., , , , , , , , , and 4 other author(s). IPDPS Workshops, page 806-815. IEEE, (2013)The INFN COSA Project: Low-Power Computing and Storage., , , , , , , , , and 9 other author(s). PARCO, volume 32 of Advances in Parallel Computing, page 770-779. IOS Press, (2017)The ExaNeSt Project: Interconnects, Storage, and Packaging for Exascale Systems., , , , , , , , , and 17 other author(s). DSD, page 60-67. IEEE Computer Society, (2016)