Author of the publication

Satisfiability Modulo Graph Theory for Task Mapping and Scheduling on Multiprocessor Systems.

, , , , and . IEEE Trans. Parallel Distributed Syst., 22 (8): 1382-1389 (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Dynamic Slot Allocation Multiple Access Protocol for Wireless ATM Networks., , , and . ICC (3), page 1560-1565. IEEE, (1997)Satisfiability Modulo Graph Theory for Task Mapping and Scheduling on Multiprocessor Systems., , , , and . IEEE Trans. Parallel Distributed Syst., 22 (8): 1382-1389 (2011)System-Level Modeling and Analysis of Thermal Effects in Optical Networks-on-Chip., , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 21 (2): 292-305 (2013)A Hardware-Software Collaborated Method for Soft-Error Tolerant MPSoC., , , , , , , , and . ISVLSI, page 260-265. IEEE Computer Society, (2011)A Hierarchical Hybrid Optical-Electronic Network-on-Chip., , , , , and . ISVLSI, page 327-332. IEEE Computer Society, (2010)Formal Worst-Case Analysis of Crosstalk Noise in Mesh-Based Optical Networks-on-Chip., , , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 21 (10): 1823-1836 (2013)System-level analysis of mesh-based hybrid optical-electronic network-on-chip., , , , , , and . ISCAS, page 321-324. IEEE, (2013)Clock Recovery for CBR Traffic in Wireless ATM Networks., , , and . ICC (1), page 16-20. IEEE, (1997)Crosstalk noise and bit error rate analysis for optical network-on-chip., , , , , , , , and . DAC, page 657-660. ACM, (2010)Active power-gating-induced power/ground noise alleviation using parasitic capacitance of on-chip memories., , , , , , , and . DATE, page 1221-1224. EDA Consortium San Jose, CA, USA / ACM DL, (2013)