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Instruction Set Design Methodology for In-Memory Computing through QEMU-based System Emulator.

, , , and . RSP, page 43-49. IEEE, (2021)

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Software platform dedicated for in-memory computing circuit evaluation., , , , and . RSP, page 43-49. ACM, (2017)Computational SRAM Design Automation using Pushed-Rule Bitcells for Energy-Efficient Vector Processing., , , , , , , and . DATE, page 1187-1192. IEEE, (2020)Towards a Truly Integrated Vector Processing Unit for Memory-bound Applications Based on a Cost-competitive Computational SRAM Design Solution., , , , , , , , and . ACM J. Emerg. Technol. Comput. Syst., 18 (2): 40:1-40:26 (2022)Memory Sizing of a Scalable SRAM In-Memory Computing Tile Based Architecture., , , , , , and . VLSI-SoC, page 166-171. IEEE, (2019)Toward Modeling Cache-Miss Ratio for Dense-Data-Access-Based Optimization., , and . RSP, page 64-70. ACM, (2019)Software testing and software fault injection., , , and . DTIS, page 1-6. IEEE, (2015)A survey on simulation-based fault injection tools for complex systems., and . DTIS, page 1-6. IEEE, (2014)Memory-Aware Design Space Exploration for Reliability Evaluation in Computing Systems., , and . J. Electron. Test., 35 (2): 145-162 (2019)Cross-layer system reliability assessment framework for hardware faults., , , , , , , , , and 4 other author(s). ITC, page 1-10. IEEE, (2016)Data-layout optimization based on memory-access-pattern analysis for source-code performance improvement., , and . SCOPES, page 1-6. ACM, (2020)