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Disambiguation of "Testa, Eleonora"

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Scalable Generic Logic Synthesis: One Approach to Rule Them All.

, , , , , , and . DAC, page 70. ACM, (2019)

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Claudio Testa

Alessandro Testa

Giovanni Andrea Testa

Laurent Testard

Eleonora Berger

 

Other publications of authors with the same name

Three-Input Gates for Logic Synthesis., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (10): 2184-2188 (2021)Reducing the Multiplicative Complexity in Logic Networks for Cryptography and Security Applications., , , and . DAC, page 74. ACM, (2019)Scalable Boolean Methods in a Modern Synthesis Flow., , , , , , , , and . DATE, page 1643-1648. IEEE, (2019)A Hybrid Method for Spectral Translation Equivalent Boolean Functions., , and . PACRIM, page 1-6. IEEE, (2019)Scalable Generic Logic Synthesis: One Approach to Rule Them All., , , , , , and . DAC, page 70. ACM, (2019)Majority logic synthesis., , , , , and . ICCAD, page 79. ACM, (2018)LUT-Based Optimization For ASIC Design Flow., , , , , , , , and . DAC, page 871-876. IEEE, (2021)Size Optimization of MIGs with an Application to QCA and STMG Technologies., , , , and . NANOARCH, page 157-162. ACM, (2018)Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic : (Special Session Paper)., , , , , , and . DATE, page 133-138. IEEE, (2020)A Logic Synthesis Toolbox for Reducing the Multiplicative Complexity in Logic Networks., , , , and . DATE, page 568-573. IEEE, (2020)