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Disambiguation of "Nayak, Ankita"

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Improving Energy Efficiency of CGRAs with Low-Overhead Fine-Grained Power Domains.

, , , , , , , , , , and . ACM Trans. Reconfigurable Technol. Syst., 16 (2): 26:1-26:28 (June 2023)

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Raghubhai Nayak

Ankita Roy

Sanjeev Kumar Nayak

Sanjit Nayak

Arnab Nayak

 

Other publications of authors with the same name

A Framework for Adding Low-Overhead, Fine-Grained Power Domains to CGRAs., , , , , , , , , and . DATE, page 846-851. IEEE, (2020)Interstellar: Using Halide's Scheduling Language to Analyze DNN Accelerators., , , , , , , , , and 2 other author(s). ASPLOS, page 369-383. ACM, (2020)ASPLOS 2020 was canceled because of COVID-19..mflowgen: a modular flow generator and ecosystem for community-driven physical design: invited., , , , , , and . DAC, page 1339-1342. ACM, (2022)Amber: Coarse-Grained Reconfigurable Array-Based SoC for Dense Linear Algebra Acceleration., , , , , , , , , and 13 other author(s). HCS, page 1-30. IEEE, (2022)Creating an Agile Hardware Design Flow., , , , , , , , , and 22 other author(s). DAC, page 1-6. IEEE, (2020)Improving Energy Efficiency of CGRAs with Low-Overhead Fine-Grained Power Domains., , , , , , , , , and 1 other author(s). ACM Trans. Reconfigurable Technol. Syst., 16 (2): 26:1-26:28 (June 2023)Amber: A 16-nm System-on-Chip With a Coarse- Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra., , , , , , , , , and 12 other author(s). IEEE J. Solid State Circuits, 59 (3): 947-959 (March 2024)Amber: A 367 GOPS, 538 GOPS/W 16nm SoC with a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra., , , , , , , , , and 13 other author(s). VLSI Technology and Circuits, page 70-71. IEEE, (2022)A secure tunable-precision architecture for image processing applications., and . ICCE, page 1-5. IEEE, (2018)