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A Comparative Study of Local Net Modeling Using Machine Learning., , and . ACM Great Lakes Symposium on VLSI, page 273-278. ACM, (2018)Amber: A 16-nm System-on-Chip With a Coarse- Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra., , , , , , , , , and 12 other author(s). IEEE J. Solid State Circuits, 59 (3): 947-959 (March 2024)Amber: A 367 GOPS, 538 GOPS/W 16nm SoC with a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra., , , , , , , , , and 13 other author(s). VLSI Technology and Circuits, page 70-71. IEEE, (2022)AHA: An Agile Approach to the Design of Coarse-Grained Reconfigurable Accelerators and Compilers., , , , , , , , , and 23 other author(s). ACM Trans. Embed. Comput. Syst., 22 (2): 35:1-35:34 (March 2023)Synthesizing Instruction Selection Rewrite Rules from RTL using SMT., , , , , , , and . FMCAD, page 139-150. IEEE, (2022)APEX: A Framework for Automated Processing Element Design Space Exploration using Frequent Subgraph Analysis., , , , , , , , and . ASPLOS (3), page 33-45. ACM, (2023)Efficiently Synthesizing Lowest Cost Rewrite Rules for Instruction Selection., , , , , , and . CoRR, (2024)Amber: Coarse-Grained Reconfigurable Array-Based SoC for Dense Linear Algebra Acceleration., , , , , , , , , and 13 other author(s). HCS, page 1-30. IEEE, (2022)SAADI: a scalable accuracy approximate divider for dynamic energy-quality scaling., , , and . ASP-DAC, page 481-486. ACM, (2019)Canal: A Flexible Interconnect Generator for Coarse-Grained Reconfigurable Arrays., , , , , and . IEEE Comput. Archit. Lett., 22 (1): 45-48 (January 2023)