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DFT Scheme for Hard-to-Detect Faults in FinFET SRAMs., , , , and . ETS, page 1-2. IEEE, (2019)Evaluating the Impact of Resistive Defects on FinFET-Based SRAMs., , , and . VLSI-SoC (Selected Papers), volume 500 of IFIP Advances in Information and Communication Technology, page 22-45. Springer, (2017)NBTI-Aware Design of Integrated Circuits: A Hardware-Based Approach for Increasing Circuits' Life Time., , , and . J. Electron. Test., 32 (3): 315-328 (2016)Analyzing the behavior of FinFET SRAMs with resistive defects., , , and . VLSI-SoC, page 1-6. IEEE, (2017)Hierarchical Memory Diagnosis., , , , , and . ETS, page 1-2. IEEE, (2022)Intermittent Undefined State Fault in RRAMs., , , , , and . ETS, page 1-6. IEEE, (2021)Evaluating the Impact of Ionizing Particles on FinFET -based SRAMs with Weak Resistive Defects., , , , , and . LATS, page 1-6. IEEE, (2020)Hard-to-Detect Fault Analysis in FinFET SRAMs., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 29 (6): 1271-1284 (2021)Defects, Fault Modeling, and Test Development Framework for RRAMs., , , , , , and . ACM J. Emerg. Technol. Comput. Syst., 18 (3): 52:1-52:26 (2022)PVT Analysis for RRAM and STT-MRAM-based Logic Computation-in-Memory., , , , , , and . ETS, page 1-6. IEEE, (2022)