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A Distributed Critical-Path Timing Monitor for a 65nm High-Performance Microprocessor., , , , , , , , и . ISSCC, стр. 398-399. IEEE, (2007)3.1 POWER9™: A processor family optimized for cognitive computing with 25Gb/s accelerator links and 16Gb/s PCIe Gen4., , , , , , , , , и 4 other автор(ы). ISSCC, стр. 50-51. IEEE, (2017)26.5 Adaptive clocking in the POWER9™ processor for voltage droop protection., , , , , , , , , и . ISSCC, стр. 444-445. IEEE, (2017)Runtime power reduction capability of the IBM POWER7+ chip., , , , , , , , , и . IBM J. Res. Dev., (2013)Fault-tolerant design of the IBM pSeries 690 system using POWER4 processor technology., , , и . IBM J. Res. Dev., 46 (1): 77-86 (2002)IBM POWER9 processor and system features for computing in the cognitive era., , , , , , , , , и 3 other автор(ы). IBM J. Res. Dev., 62 (4/5): 1:1-1:11 (2018)Adaptive guardband scheduling to improve system-level efficiency of the POWER7+., , , , , и . MICRO, стр. 308-321. ACM, (2015)Accurate Fine-Grained Processor Power Proxies., , , , , , , и . MICRO, стр. 224-234. IEEE Computer Society, (2012)Architecting for power management: The IBM POWER7TM approach., , , , , , и . HPCA, стр. 1-11. IEEE Computer Society, (2010)Adaptive energy management features of the POWER7TM processor., , , , , , и . Hot Chips Symposium, стр. 1-18. IEEE, (2010)