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IBM POWER9 package technology and design., , , , , , , , and . IBM J. Res. Dev., 62 (4/5): 12:1-12:10 (2018)3.1 POWER9™: A processor family optimized for cognitive computing with 25Gb/s accelerator links and 16Gb/s PCIe Gen4., , , , , , , , , and 4 other author(s). ISSCC, page 50-51. IEEE, (2017)Summit and Sierra: Designing AI/HPC Supercomputers., , and . ISSCC, page 42-43. IEEE, (2019)The 24-Core POWER9 Processor With Adaptive Clocking, 25-Gb/s Accelerator Links, and 16-Gb/s PCIe Gen4., , , , , , , , , and 13 other author(s). IEEE J. Solid State Circuits, 53 (1): 91-101 (2018)A 4.5 mW/Gb/s 6.4 Gb/s 22+1-Lane Source Synchronous Receiver Core With Optional Cleanup PLL in 65 nm CMOS., , , , , , and . IEEE J. Solid State Circuits, 45 (12): 2850-2860 (2010)4.1 22nm Next-generation IBM System z microprocessor., , , , , , , , , and 21 other author(s). ISSCC, page 1-3. IEEE, (2015)POWER10™: A 16-Core SMT8 Server Processor With 2TB/s Off-Chip Bandwidth in 7nm Technology., , , , , , , , , and 2 other author(s). ISSCC, page 48-50. IEEE, (2022)A 2.6 mW/Gbps 12.5 Gbps RX With 8-Tap Switched-Capacitor DFE in 32 nm CMOS., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 47 (4): 897-910 (2012)The IBM POWER7 HUB module: A terabyte interconnect switch for high-performance computer systems., , , , , and . Hot Chips Symposium, page 1-33. IEEE, (2010)POWER7™, a Highly Parallel, Scalable Multi-Core High End Server Processor., , , , , , , , , and 14 other author(s). IEEE J. Solid State Circuits, 46 (1): 145-161 (2011)