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Disambiguation of "Matsuura, Tatsuji"

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Multi-bit sigma-delta TDC architecture with self-calibration.

, , , , , , , , , , , , and . APCCAS, page 671-674. IEEE, (2012)

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Takeshi Matsuura

 

Other publications of authors with the same name

Integrated CMOS ADC - Tutorial review on recent hybrid SAR-ADCs.. MIXDES, page 29-34. IEEE, (2017)Background calibration algorithm for pipelined ADC with open-loop residue amplifier using split ADC structure., , , , , , and . APCCAS, page 200-203. IEEE, (2010)Duty Ratio and Capacitance Analysis of AC/DC Converter without Current Control Circuit., , , and . ISPACS, page 1-2. IEEE, (2019)Examination of Incremental ADC with SAR ADC to Reduce Conversion Time with High Accuracy., , , and . ISPACS, page 1-2. IEEE, (2019)A 12-bit 1.25MS/s Area-Efficient Radix-Value Self-Estimated Non-Binary Cyclic ADC with Relaxed Requirements on Analog Components., , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 100-A (2): 534-540 (2017)Non-binary SAR ADC with digital error correction for low power applications., , , , , , , , and . APCCAS, page 196-199. IEEE, (2010)A 14bit 80kSPS non-binary cyclic ADC without high accuracy analog components., , , , , and . ASP-DAC, page 15-16. IEEE, (2017)A 12-Bit 3.3MS/S pipeline cyclic ADC with correlated level shifting technique., , , , , , and . ISPACS, page 602-605. IEEE, (2017)ΔΣ ADCs and Converter Techniques., and . ISSCC, page 236-237. IEEE, (2007)Non-binary cyclic and binary SAR hybrid ADC., , , and . MIXDES, page 105-109. IEEE, (2017)