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An Automated Design Methodology for Computational SRAM Dedicated to Highly Data-Centric Applications: Invited Paper.

, , , , , , , and . SLIP, page 4:1-4:7. ACM, (2022)

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An Automated Design Methodology for Computational SRAM Dedicated to Highly Data-Centric Applications: Invited Paper., , , , , , , and . SLIP, page 4:1-4:7. ACM, (2022)Low-Overhead Implementation of Binarized Neural Networks Employing Robust 2T2R Resistive RAM Bridges., , , , , , , and . ESSCIRC, page 83-86. IEEE, (2021)Binary ReRAM-based BNN first-layer implementation., , , , , , , , and . DATE, page 1-6. IEEE, (2023)Design methodology for area and energy efficient OxRAM-based non-volatile flip-flop., , , , , , and . ISCAS, page 1-4. IEEE, (2017)Architecture, design and technology guidelines for crosspoint memories., , , , , and . NANOARCH, page 55-60. IEEE, (2017)Reconfigurable tiles of computing-in-memory SRAM architecture for scalable vectorization., , , , , , , and . ISLPED, page 121-126. ACM, (2020)An Optimal Open-Loop Strategy for Handling a Flexible Beam with a Robot Manipulator., , , , , and . ICRA, page 3168-3174. IEEE, (2023)High density emerging resistive memories: What are the limits?, , , , and . LASCAS, page 1-4. IEEE, (2017)Benefits of Design Assist Techniques on Performances and Reliability of a RRAM Macro., , , , , , , , , and 9 other author(s). IMW, page 1-4. IEEE, (2023)Can we go towards true 3-D architectures?, , , , , and . DAC, page 282-283. ACM, (2011)