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Disambiguation of "Boon, Chirn Chye"

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Monolithically Integrated GaN+CMOS Logic Circuits Design and Electro-Thermal Analysis for High-Voltage Applications.

, , , , , , , and . BCICTS, page 1-4. IEEE, (2020)

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Ellen Boon

Soonthorn Boonyanit

Prachya Boonkwan

Prasiddhiporn Boon-Long

Paungthip Boonperm

 

Other publications of authors with the same name

A 57.9-to-68.3 GHz 24.6 mW Frequency Synthesizer With In-Phase Injection-Coupled QVCO in 65 nm CMOS Technology., , , , and . IEEE J. Solid State Circuits, 49 (2): 347-359 (2014)Monolithically Integrated GaN+CMOS Logic Circuits Design and Electro-Thermal Analysis for High-Voltage Applications., , , , , , , and . BCICTS, page 1-4. IEEE, (2020)A Single-Channel 10GS/s 8b>36.4d8 SNDR Time-Domain ADC Featuring Loop-Unrolled Asynchronous Successive Approximation in 28nm CMOS., , , and . ISSCC, page 278-279. IEEE, (2023)A 3GS/s Highly Linear Energy Efficient Constant-Slope Based Voltage-to-Time Converter., , , and . ISCAS, page 1-5. IEEE, (2020)Design of quarter-wavelength resonator filters with coupling controllable paths., , , , , , and . APCCAS, page 248-251. IEEE, (2012)Editorial., , , , , , , , , and 35 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 25 (1): 1-20 (2017)RF CMOS low-phase-noise LC oscillator through memory reduction tail transistor., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 51-II (2): 85-90 (2004)An Energy-Aware CMOS Receiver Front End for Low-Power 2.4-GHz Applications., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 57-I (10): 2675-2684 (2010)Design of a fully integrated CMOS dual K- and W-band lumped wilkinson power divider., , , , , and . MWSCAS, page 788-791. IEEE, (2013)A 0.0071-mm2 10.8pspp-Jitter 4 to 10-Gb/s 5-Tap Current-Mode Transmitter Using a Hybrid Delay Line for Sub-1-UI Fractional De-Emphasis., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (10): 3991-4004 (2019)