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Statistical Estimation of Dominant Physical Parameters for Leakage Variability in 32 Nanometer CMOS, Under Supply Voltage Variations.

S. Joshi, A. Lombardot, P. Flatresse, C. D'Agostino, A. Juge, E. Beigné, and S. Girard. J. Low Power Electron., 8 (1): 113-124 (2012)

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Edith Beißer

Edith Kollascheck

Edith Claren

Edith Reddig

Edith Reimann

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Session 18 overview: Adaptive circuits and digital regulators: Digital circuit techniques subcommittee.D. Sylvester, K. Hirairi, and E. Beigné. ISSCC, page 298-299. IEEE, (2018)Evaluation of Low-Voltage SRAM for Error-Resilient Augmented Reality Applications.T. Wu, D. Kim, D. Morris, and E. Beigné. SiPS, page 1-3. IEEE, (2021)An On-Chip Multi-mode Buck DC-DC Converter for Fine-Grain DVS on a Multi-power Domain SoC Using a 65-nm Standard CMOS Logic Process.M. Ichihashi, H. Lhermet, E. Beigné, F. Rothan, M. Belleville, and A. Amara. PATMOS, volume 5953 of Lecture Notes in Computer Science, page 336-346. Springer, (2009)Fine grain multi-VT co-integration methodology in UTBB FD-SOI technology.B. Pelloux-Prayer, A. Valentian, B. Giraud, Y. Thonnart, J. Noel, P. Flatresse, and E. Beigné. VLSI-SoC, page 168-173. IEEE, (2013)Event-driven asynchronous voltage monitoring in energy harvesting platforms.J. Christmann, E. Beigné, C. Condemine, and C. Piguet. NEWCAS, page 457-460. IEEE, (2012)Session 7 overview: Neuromorphic, clocking and security circuits: Digital circuits subcommittee.Y. Shin, P. Restle, and E. Beigné. ISSCC, page 116-117. IEEE, (2018)AsyncRFID: Fully Asynchronous Contactless Systems, Providing High Data Rates, Low Power and Dynamic Adaptation.D. Caucheteux, E. Beigné, E. Crochon, and M. Renaudin. ASYNC, page 86-97. IEEE Computer Society, (2006)Benefits of Joint Optimization of Tunable Wake-up Radio Architecture and Protocols.M. Maman, D. Morche, B. Martineau, C. Jany, I. Panades, A. Quelen, F. Badets, and E. Beigné. ICECS, page 789-792. IEEE, (2018)An Asynchronous Power Aware and Adaptive NoC Based Circuit.E. Beigné, F. Clermidy, H. Lhermet, S. Miermont, Y. Thonnart, X. Tran, A. Valentian, D. Varreau, P. Vivet, X. Popon and 1 other author(s). IEEE J. Solid State Circuits, 44 (4): 1167-1177 (2009)A fully integrated power supply unit for fine grain power management application to embedded Low Voltage SRAMs.E. Beigné, F. Clermidy, S. Miermont, A. Valentian, P. Vivet, S. Barasinski, F. Blisson, N. Kohli, and S. Kumar. ESSCIRC, page 138-141. IEEE, (2008)

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Disambiguation of "Beigné, Edith"

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Statistical Estimation of Dominant Physical Parameters for Leakage Variability in 32 Nanometer CMOS, Under Supply Voltage Variations.

Please choose a person to relate this publication to

Edith Beißer

Edith Kollascheck

Edith Claren

Edith Reddig

Edith Reimann

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Beigné, Edith"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Statistical Estimation of Dominant Physical Parameters for Leakage Variability in 32 Nanometer CMOS, Under Supply Voltage Variations.

Please choose a person to relate this publication to

Edith Beißer

Edith Kollascheck

Edith Claren

Edith Reddig

Edith Reimann

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
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Statistical Estimation of Dominant Physical Parameters for Leakage Variability in 32 Nanometer CMOS, Under Supply Voltage Variations.