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Revisiting 3DIC benefit with multiple tiers.

, , и . Integr., (2017)

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Wei-Ting Liu

Carolyn Wei Ji Chan

M Tingart

Wen-tsi Ting

Wei Wei

 

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3DIC benefit estimation and implementation guidance from 2DIC implementation., , , , и . DAC, стр. 30:1-30:6. ACM, (2015)Revisiting 3DIC benefit with multiple tiers., , и . Integr., (2017)ITRS 2.0: Toward a re-framing of the Semiconductor Technology Roadmap., , , , и . ICCD, стр. 139-146. IEEE Computer Society, (2014)Learning-based prediction of embedded memory timing failures during initial floorplan design., , , , и . ASP-DAC, стр. 178-185. IEEE, (2016)BEOL stack-aware routability prediction from placement using data mining techniques., , , , и . ICCD, стр. 41-48. IEEE Computer Society, (2016)Statistical analysis and modeling for error composition in approximate computation circuits., , , , и . ICCD, стр. 47-53. IEEE Computer Society, (2013)On Aging-Aware Signoff for Circuits With Adaptive Voltage Scaling., , и . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (10): 2920-2930 (2014)Methodology for electromigration signoff in the presence of adaptive voltage scaling., , и . SLIP, стр. 6:1-6:7. IEEE Computer Society, (2014)ILP-Based Identification of Redundant Logic Insertions for Opportunistic Yield Improvement during Early Process Learning., , и . ICCD, стр. 269-272. IEEE Computer Society, (2017)Routability Optimization for Industrial Designs at Sub-14nm Process Nodes Using Machine Learning., , , и . ISPD, стр. 15-21. ACM, (2017)