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Rigel: an architecture and scalable programming interface for a 1000-core accelerator., , , , , , , , и . ISCA, стр. 140-151. ACM, (2009)Architecting an Energy-Efficient DRAM System for GPUs., , , , , , и . HPCA, стр. 73-84. IEEE Computer Society, (2017)Speculative reconvergence for improved SIMT efficiency., , , , , , и . CGO, стр. 121-132. ACM, (2020)A Task-Centric Memory Model for Scalable Accelerator Architectures., , , , и . PACT, стр. 77-87. IEEE Computer Society, (2009)Cohesion: a hybrid memory model for accelerators., , , , и . ISCA, стр. 429-440. ACM, (2010)A variable warp size architecture., , , и . ISCA, стр. 489-501. ACM, (2015)A patch memory system for image processing and computer vision., , , , и . MICRO, стр. 51:1-51:13. IEEE Computer Society, (2016)GoldMine: Automatic assertion generation using data mining and static analysis., , , , , и . DATE, стр. 626-629. IEEE Computer Society, (2010)A Task-Centric Memory Model for Scalable Accelerator Architectures., , , , и . IEEE Micro, 30 (1): 29-39 (2010)Tradeoffs in designing accelerator architectures for visual computing., , , и . MICRO, стр. 164-175. IEEE Computer Society, (2008)