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MNSIM 2.0: A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems.

Z. Zhu, H. Sun, K. Qiu, L. Xia, G. Krishnan, G. Dai, D. Niu, X. Chen, X. Hu, Y. Cao, Y. Xie, Y. Wang, and H. Yang. ACM Great Lakes Symposium on VLSI, page 83-88. ACM, (2020)

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Yang Yang

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ASP-SIFT: Using Analog Signal Processing Architecture to Accelerate Keypoint Detection of SIFT Algorithm.Z. Fan, Z. Liu, Z. Qu, F. Qiao, Q. Wei, X. Liu, Y. Sun, S. Xu, and H. Yang. IEEE Trans. Very Large Scale Integr. Syst., 28 (1): 198-211 (2020)A General Logic Synthesis Framework for Memristor-based Logic Design.Z. Zhu, M. Ma, J. Liu, L. Xu, X. Chen, Y. Yang, Y. Wang, and H. Yang. ICCAD, page 1-8. ACM, (2019)Predicting Coronary Heart Disease Using an Improved LightGBM Model: Performance Analysis and Comparison.H. Yang, Z. Chen, H. Yang, and M. Tian. IEEE Access, (2023)DyTAN: Dynamic Ternary Content Addressable Memory Using Nanoelectromechanical Relays.H. Zhong, S. Cao, L. Jiang, X. An, V. Narayanan, Y. Liu, H. Yang, and X. Li. IEEE Trans. Very Large Scale Integr. Syst., 29 (11): 1981-1993 (2021)MSP-MFCC: Energy-Efficient MFCC Feature Extraction Method With Mixed-Signal Processing Architecture for Wearable Speech Recognition Applications.Q. Li, Y. Yang, T. Lan, H. Zhu, Q. Wei, F. Qiao, X. Liu, and H. Yang. IEEE Access, (2020)A Single-Magnetic Bidirectional Integrated Equalizer Using Multi-Winding Transformer and Voltage Multiplier for Hybrid Energy Storage System.L. Liu, Z. Yan, B. Xu, P. Zhang, C. Cai, H. Yang, L. Zhang, and S. Wang. IEEE Trans. Veh. Technol., 72 (6): 7318-7327 (June 2023)ProtFe: Low-Cost Secure Power Side-Channel Protection for General and Custom FeFET-Based Memories.T. Li, B. Sun, H. Zhong, Y. Xu, V. Narayanan, L. Shi, T. Wang, Y. Yu, T. Kämpfe, K. Ni and 2 other author(s). ACM Trans. Design Autom. Electr. Syst., 29 (1): 3:1-3:18 (January 2024)Mixup Asymmetric Tri-Training for Heartbeat Classification Under Domain Shift.J. Li, G. Wang, M. Chen, Z. Ding, and H. Yang. IEEE Signal Process. Lett., (2021)A Weight-Reload-Eliminated Compute-in-Memory Accelerator for 60 fps 4K Super-Resolution.Y. Li, J. Yue, J. Wang, C. Tang, Y. He, W. Jia, K. Zou, L. Zhang, H. Yang, and Y. Liu. IEEE Trans. Circuits Syst. II Express Briefs, 70 (3): 1179-1183 (March 2023)Gibbon: An Efficient Co-Exploration Framework of NN Model and Processing-In-Memory Architecture.H. Sun, Z. Zhu, C. Wang, X. Ning, G. Dai, H. Yang, and Y. Wang. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (11): 4075-4089 (November 2023)

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Disambiguation of "Yang, Huazhong"

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MNSIM 2.0: A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems.

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Yang Yang

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Yang, Huazhong"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML MNSIM 2.0: A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems.

Please choose a person to relate this publication to

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Other publications of authors with the same name

Disambiguation

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URL
DOI
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MNSIM 2.0: A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems.