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An effective BIST architecture for power-gating mechanisms in low-power SRAMs.

, , , , и . ISQED, стр. 185-191. IEEE, (2016)

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Sabrina Zordan

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On the reuse of read and write assist circuits to improve test efficiency in low-power SRAMs., , , , , , и . ITC, стр. 1-10. IEEE Computer Society, (2013)On the Use of Assist Circuits for Improved Coupling Fault Detection in SRAMs., , и . ATS, стр. 61-66. IEEE Computer Society, (2015)Optimized march test flow for detecting memory faults in SRAM devices under bit line coupling., , , , , , и . DDECS, стр. 353-358. IEEE Computer Society, (2011)A built-in scheme for testing and repairing voltage regulators of low-power srams., , , , , , и . VTS, стр. 1-6. IEEE Computer Society, (2013)On the Test and Mitigation of Malfunctions in Low-Power SRAMs., , , , , и . J. Electron. Test., 30 (5): 611-627 (2014)Test solution for data retention faults in low-power SRAMs., , , , , , и . DATE, стр. 442-447. EDA Consortium San Jose, CA, USA / ACM DL, (2013)An effective BIST architecture for power-gating mechanisms in low-power SRAMs., , , , и . ISQED, стр. 185-191. IEEE, (2016)Failure mechanisms and test methods for the SRAM TVC write-assist technique., , , и . ETS, стр. 1-2. IEEE, (2016)Low-power SRAMs power mode control logic: Failure analysis and test solutions., , , , , , и . ITC, стр. 1-10. IEEE Computer Society, (2012)Failure Analysis and Test Solutions for Low-Power SRAMs., , , , , , , и . Asian Test Symposium, стр. 459-460. IEEE Computer Society, (2011)