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Grain Size Reduction of Ferroelectric HZO Enabled by a Novel Solid Phase Epitaxy (SPE) Approach: Working Principle, Experimental Demonstration, and Theoretical Understanding.

D. Zhang, J. Wu, Q. Kong, Z. Zhou, L. Liu, K. Han, C. Sun, X. Wang, G. Liu, L. Jiao, Z. Zheng, Y. Kang, J. Chen, and X. Gong. VLSI Technology and Circuits, page 1-2. IEEE, (2023)

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Xu Qiwen

Thay Kong

Xiangqing Kong

Seunghyun Kong

Deming Kong

Other publications of authors with the same name

First InGaAs/InAlAs Single-Photon Avalanche Diodes (SPADs) Heterogeneously Integrated with Si Photonics on SOI Platform for 1550 nm Detection.J. Zhang, H. Xu, G. Zhang, Y. Chen, H. Wang, K. Tan, S. Wicaksono, C. Wang, C. Sun, Q. Kong and 3 other author(s). VLSI Circuits, page 1-2. IEEE, (2021)First Demonstration of BEOL-compatible Amorphous InGaZnOx Channel Antiferroelectric (Hf0.2Zr0.8O2)-Enhanced Floating Gate Memory.Z. Zheng, J. Xie, Y. Sun, Y. Xu, X. Wang, L. Jiao, Z. Zhou, Q. Kong, Y. Chen, and X. Gong. ICICDT, page 29-33. IEEE, (2023)Grain Size Reduction of Ferroelectric HZO Enabled by a Novel Solid Phase Epitaxy (SPE) Approach: Working Principle, Experimental Demonstration, and Theoretical Understanding.D. Zhang, J. Wu, Q. Kong, Z. Zhou, L. Liu, K. Han, C. Sun, X. Wang, G. Liu, L. Jiao and 4 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)First Demonstration of BEOL-Compatible MFMIS Fe-FETs with 3D Multi-Fin Floating Gate: In-situ ALD-deposited MFM, LCH of 50 nm, > 2×109 Endurance, and 58.3% Area Saving.X. Wang, Z. Zheng, Q. Kong, L. Jiao, K. Han, C. Sun, Z. Zhou, L. Liu, Y. Kang, G. Liu and 2 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)Non-Destructive-Read 1T1C Ferroelectric Capacitive Memory Cell with BEOL 3D Monolithically Integrated IGZO Access Transistor for 4F2 High-Density Integration.Z. Zhou, L. Jiao, Q. Kong, Z. Zheng, K. Han, Y. Chen, C. Sun, B. Nguyen, and X. Gong. VLSI Technology and Circuits, page 1-2. IEEE, (2023)BEOL-compatible Ta/HZO/W Ferroelectric Tunnel Junction with Low Operating Voltage Targeting for Low Power Application.L. Jiao, Z. Zhou, Z. Zheng, Y. Kang, C. Sun, Q. Kong, X. Wang, D. Zhang, G. Liu, L. Liu and 1 other author(s). ICICDT, page 5-7. IEEE, (2022)First Demonstration of Fully CMOS-compatible Non-volatile Programmable Photonic Switch Enabled by Ferroelectric-SOI Waveguide for Next Generation Photonic Integrated Circuit.Y. Chen, G. Zhang, J. Zhou, Z. Zheng, L. Jiao, H. Wang, Z. Zhou, A. Kumar, J. Zhang, Y. Wang and 3 other author(s). VLSI Technology and Circuits, page 405-406. IEEE, (2022)Extremely Scaled Bottom Gate a-IGZO Transistors Using a Novel Patterning Technique Achieving Record High Gm of 479.5 μS/μm (VDS of 1 V) and fT of 18.3 GHz (VDS of 3 V).C. Wang, A. Kumar, K. Han, C. Sun, H. Xu, J. Zhang, Y. Kang, Q. Kong, Z. Zheng, Y. Wang and 1 other author(s). VLSI Technology and Circuits, page 294-295. IEEE, (2022)First Si-Waveguide-Integrated InGaAs/InAlAs Avalanche Photodiodes on SOI Platform.J. Zhang, H. Xu, K. Tan, S. Wicaksono, Q. Kong, G. Zhang, Y. Chen, C. Sun, H. Wang, C. Wang and 6 other author(s). VLSI Technology and Circuits, page 409-410. IEEE, (2022)Boosting the Memory Window of the BEOL-Compatible MFMIS Ferroelectric/ Anti-Ferroelectric FETs by Charge Injection.Z. Zheng, C. Sun, L. Jiao, D. Zhang, Z. Zhou, X. Wang, G. Liu, Q. Kong, Y. Chen, K. Ni and 1 other author(s). VLSI Technology and Circuits, page 389-390. IEEE, (2022)

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Disambiguation of "Kong, Qiwen"