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A 20nm 1.8V 8Gb PRAM with 40MB/s program bandwidth., , , , , , , , , и 20 other автор(ы). ISSCC, стр. 46-48. IEEE, (2012)A 24Gb/s/pin PAM-4 Built Out Tester chip enabling PAM-4 chips test with NRZ interface ATE., , , , , , , , , и . A-SSCC, стр. 1-3. IEEE, (2021)VSCHH 2023: A Benchmark for the View Synthesis Challenge of Human Heads., , , , , , , , , и 27 other автор(ы). ICCV (Workshops), стр. 1113-1120. IEEE, (2023)A Time-Based PAM-4 Transceiver Using Single Path Decoder and Fast-Stochastic Calibration Techniques., , , , , и . A-SSCC, стр. 1-3. IEEE, (2023)A 430-MS/s 7-b Asynchronous SAR ADC With a 40 fF Input Sampling Capacitor., , , , , , , , и . ISOCC, стр. 235-236. IEEE, (2022)13.1 A 1Tb 4b/cell NAND Flash Memory with tPROG=2ms, tR=110µs and 1.2Gb/s High-Speed IO Rate., , , , , , , , , и 35 other автор(ы). ISSCC, стр. 218-220. IEEE, (2020)A 512-Gb 3-b/Cell 64-Stacked WL 3-D-NAND Flash Memory., , , , , , , , , и 20 other автор(ы). IEEE J. Solid State Circuits, 53 (1): 124-133 (2018)Temperature-Tracking Sensing Scheme With Adaptive Precharge and Noise Compensation Scheme in PRAM., , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (8): 2091-2102 (2015)A 3.2-12.8Gb/s Duty-Cycle Compensating Quadrature Error Corrector for DRAM Interfaces, With Fast Locking and Low Power Characteristics., , , , , , , , , и 4 other автор(ы). ESSCIRC, стр. 463-466. IEEE, (2021)Documenting Computing Environments for Reproducible Experiments., , , , и . PARCO, том 36 из Advances in Parallel Computing, стр. 756-765. IOS Press, (2019)