Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Experimental Demonstration of An Inversion-Type Ferroelectric Capacitive Memory and its 1 kbit Crossbar Array Featuring High CHCS/CLCS, Fast Speed, and Long Retention.

Z. Zhou, L. Jiao, J. Zhou, Z. Zheng, Y. Chen, K. Han, Y. Kang, and X. Gong. VLSI Technology and Circuits, page 357-358. IEEE, (2022)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Muxin Han

Luyang Han

Mei Han

Johannes Han

Xiaohong Han

Other publications of authors with the same name

First Demonstration of BEOL-Compatible Write-Enhanced Ferroelectric-Modulated Diode (FMD): New Possibility for Oxide Semiconductor Memory Devices.L. Jiao, K. Han, Z. Zhou, Z. Zheng, X. Wang, Q. Kong, Y. Kang, J. Zhang, L. Liu, and X. Gong. VLSI Technology and Circuits, page 1-2. IEEE, (2023)Performance Evaluation of Static Random Access Memory (SRAM) based on Negative Capacitance FinFET.C. Sun, K. Han, and X. Gong. ICICDT, page 1-4. IEEE, (2019)Extremely Scaled Bottom Gate a-IGZO Transistors Using a Novel Patterning Technique Achieving Record High Gm of 479.5 μS/μm (VDS of 1 V) and fT of 18.3 GHz (VDS of 3 V).C. Wang, A. Kumar, K. Han, C. Sun, H. Xu, J. Zhang, Y. Kang, Q. Kong, Z. Zheng, Y. Wang and 1 other author(s). VLSI Technology and Circuits, page 294-295. IEEE, (2022)First Monolithic Integration of Group IV Waveguide Photodetectors and Modulators on 300 mm Si Substrates for 2-μm Wavelength Optoelectronic Integrated Circuit.H. Wang, G. Zhang, Y. Chen, J. Zhang, K. Han, Y. Huang, and X. Gong. VLSI Technology and Circuits, page 407-408. IEEE, (2022)Grain Size Reduction of Ferroelectric HZO Enabled by a Novel Solid Phase Epitaxy (SPE) Approach: Working Principle, Experimental Demonstration, and Theoretical Understanding.D. Zhang, J. Wu, Q. Kong, Z. Zhou, L. Liu, K. Han, C. Sun, X. Wang, G. Liu, L. Jiao and 4 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)First Demonstration of BEOL-Compatible MFMIS Fe-FETs with 3D Multi-Fin Floating Gate: In-situ ALD-deposited MFM, LCH of 50 nm, > 2×109 Endurance, and 58.3% Area Saving.X. Wang, Z. Zheng, Q. Kong, L. Jiao, K. Han, C. Sun, Z. Zhou, L. Liu, Y. Kang, G. Liu and 2 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)Non-Destructive-Read 1T1C Ferroelectric Capacitive Memory Cell with BEOL 3D Monolithically Integrated IGZO Access Transistor for 4F2 High-Density Integration.Z. Zhou, L. Jiao, Q. Kong, Z. Zheng, K. Han, Y. Chen, C. Sun, B. Nguyen, and X. Gong. VLSI Technology and Circuits, page 1-2. IEEE, (2023)Novel Bridge Transmission Line Method for Thin-Film Semiconductors: Modelling, Simulation Verification, and Experimental Demonstration.K. Han, Y. Kang, Y. Chen, and X. Gong. VLSI Technology and Circuits, page 1-2. IEEE, (2023)Thickness-Engineered Extremely-thin Channel High Performance ITO TFTs with Raised S/D Architecture: Record-Low RSD, Highest Moblity (Sub-4 nm TCH Regime), and High VTH Tunability.Y. Kang, K. Han, Y. Chen, and X. Gong. VLSI Technology and Circuits, page 1-2. IEEE, (2023)First Demonstration of Work Function-Engineered BEOL-Compatible IGZO Non-Volatile MFMIS AFeFETs and Their Co-Integration with Volatile-AFeFETs.Z. Zheng, L. Jiao, Z. Zhou, Y. Wang, L. Liu, K. Han, C. Sun, Q. Kong, D. Zhang, X. Wang and 2 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)

BibSonomy

Disambiguation of "Han, Kaizhen"