( en | de | ru )

 

Disambiguation of "Chasin, Adrian Vaisman"

Author of the publication

copydeleteadd this publication to your clipboard
Temperature Dependent Mismatch and Variability in a Cryo-CMOS Array with 30k Transistors.

, , , , , , , , , , , and . IRPS, page 10. IEEE, (2022)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Jda Chasin

Philip Stewart Chasin

Adrian Gabriel

Nicole Adrian

Adrian Lucaciu

 

Other publications of authors with the same name

A High Power Density Electrostatic Vibration-to-Electric Energy Converter Based On An In-Plane Overlap Plate (IPOP) Mechanism, , , , , and . CoRR, (2008)The properties, effect and extraction of localized defect profiles from degraded FET characteristics., , , , , , , , , and 1 other author(s). IRPS, page 1-7. IEEE, (2021)MTJ degradation in SOT-MRAM by self-heating-induced diffusion., , , , , , , and . IRPS, page 4. IEEE, (2022)Conduction and Breakdown Mechanisms in Low-k Spacer and Nitride Spacer Dielectric Stacks in Middle of Line Interconnects., , , , and . IRPS, page 1-6. IEEE, (2020)New methodology for modelling MOL TDDB coping with variability., , , , , and . IRPS, page 3. IEEE, (2018)A brief overview of gate oxide defect properties and their relation to MOSFET instabilities and device and circuit time-dependent variability., , , , , , , , , and 4 other author(s). Microelectron. Reliab., (2018)Simulation Comparison of Hot-Carrier Degradation in Nanowire, Nanosheet and Forksheet FETs., , , , , , , , , and . IRPS, page 6. IEEE, (2022)Temperature Dependent Mismatch and Variability in a Cryo-CMOS Array with 30k Transistors., , , , , , , , , and 2 other author(s). IRPS, page 10. IEEE, (2022)Stochastic Modeling of Hot-Carrier Degradation in nFinFETs Considering the Impact of Random Traps and Random Dopants., , , , , , , , , and 1 other author(s). ESSDERC, page 262-265. IEEE, (2019)Investigation of the Impact of Ferroelectricity Boosted Gate Stacks for 3D NAND on Short Time Data Retention and Endurance., , , , , , , , , and . IRPS, page 1-6. IEEE, (2024)