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1S1R sub-threshold operation in Crossbar arrays for low power BNN inference computing.

J. Lopez, F. Rummens, L. Reganaz, A. Heraud, T. Hirtzlin, L. Grenouillet, G. Navarro, M. Bernard, C. Carabasse, N. Castellani, V. Meli, S. Martin, T. Magis, E. Vianello, C. Sabbione, D. Deleruyelle, M. Bocquet, J. Portal, G. Molas, and F. Andrieu. IMW, page 1-4. IEEE, (2022)

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Niccolò Tosi

Niccolo Lazzarini

Ottmar Castellani

Christopher Castellani

Michela Castellani

Other publications of authors with the same name

Metal Oxide Resistive Memory (OxRAM) and Phase Change Memory (PCM) as Artificial Synapses in Spiking Neural Networks.E. Vianello, D. Ly, S. Barbera, T. Dalgaty, N. Castellani, G. Navarro, G. Bourgeois, A. Valentian, E. Nowak, and D. Querlioz. ICECS, page 561-564. IEEE, (2018)16kbit 1T1R OxRAM arrays embedded in 28nm FDSOI technology demonstrating low BER, high endurance, and compatibility with core logic transistors.L. Grenouillet, N. Castellani, A. Persico, V. Meli, S. Martin, O. Billoint, R. Segaud, S. Bernasconi, C. Pellissier, C. Jahan and 20 other author(s). IMW, page 1-4. IEEE, (2021)High temperature stability embedded ReRAM for 2x nm node and beyond.G. Molas, G. Piccolboni, A. Bricalli, A. Verdy, I. Naot, Y. Cohen, A. Regev, I. Naveh, D. Deleruyelle, Q. Rafhay and 9 other author(s). IMW, page 1-4. IEEE, (2022)Multilevel Programming Reliability in Si-doped GeSbTe for Storage Class Memory.G. Lama, M. Bernard, N. Bernier, G. Bourgeois, E. Nolot, N. Castellani, J. Garrione, M. Cyrille, G. Navarro, and E. Nowak. IRPS, page 1-6. IEEE, (2021)TCAD modeling of performance and reliability of nano-scale memory devices.N. Castellani. Polytechnic University of Milan, Italy, (2014)Innovative GeS2/Sb2Te3 based phase change memory for low power applications.J. Kluge, A. Verdy, G. Navarro, S. Blonkowski, V. Sousa, S. Chevalliez, P. Kowalczyk, M. Bernard, N. Bernier, G. Bourgeois and 3 other author(s). NVMTS, page 1-4. IEEE, (2017)Hardware calibrated learning to compensate heterogeneity in analog RRAM-based Spiking Neural Networks.F. Moro, E. Esmanhotto, T. Hirtzlin, N. Castellani, A. Trabelsi, T. Dalgaty, G. Molas, F. Andrieu, S. Brivio, S. Spiga and 3 other author(s). ISCAS, page 380-383. IEEE, (2022)Experimental Demonstration of Multilevel Resistive Random Access Memory Programming for up to Two Months Stable Neural Networks Inference Accuracy.E. Esmanhotto, T. Hirtzlin, D. Bonnet, N. Castellani, J. Portal, D. Querlioz, and E. Vianello. Adv. Intell. Syst., (2022)Integration of HfO2-based 3D OxRAM with GAA stacked-nanosheet transistor for high-density embedded memory.T. Dubreuil, S. Barraud, J. Pedini, J. Hartmann, F. Boulard, A. Sarrazin, A. Gharbi, J. Sturm, A. Lambert, S. Martin and 5 other author(s). ESSDERC, page 117-120. IEEE, (2023)Investigation of resistance fluctuations in ReRAM: physical origin, temporal dependence and impact on memory reliability.L. Reganaz, D. Deleruyelle, Q. Rafhay, J. Lopez, N. Castellani, J. Nodin, A. Bricalli, G. Piccolboni, G. Molas, and F. Andrieu. IRPS, page 1-6. IEEE, (2023)

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Disambiguation of "Castellani, Niccolo"

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1S1R sub-threshold operation in Crossbar arrays for low power BNN inference computing.

Please choose a person to relate this publication to

Niccolò Tosi

Niccolo Lazzarini

Ottmar Castellani

Christopher Castellani

Michela Castellani

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Castellani, Niccolo"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 1S1R sub-threshold operation in Crossbar arrays for low power BNN inference computing.

Please choose a person to relate this publication to

Niccolò Tosi

Niccolo Lazzarini

Ottmar Castellani

Christopher Castellani

Michela Castellani

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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MSOffice XML

1S1R sub-threshold operation in Crossbar arrays for low power BNN inference computing.