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Optimization of Overdrive Signoff in High-Performance and Low-Power ICs.

, , , , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (8): 1552-1556 (2015)

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Optimization of Overdrive Signoff in High-Performance and Low-Power ICs., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (8): 1552-1556 (2015)Electrical Modeling of Lithographic Imperfections., , and . VLSI Design, page 423-428. IEEE Computer Society, (2010)Improved signoff methodology with tightened BEOL corners., , and . ICCD, page 311-316. IEEE Computer Society, (2014)Revisiting inherent noise floors for interconnect prediction., , and . SLIP, page 10. ACM, (2020)Improved path clustering for adaptive path-delay testing., and . ISQED, page 13-20. IEEE, (2012)LTCC spiral inductor modeling, synthesis, and optimization., , , and . ASP-DAC, page 768-771. IEEE, (2008)On Aging-Aware Signoff for Circuits With Adaptive Voltage Scaling., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (10): 2920-2930 (2014)Benchmarking of Mask Fracturing Heuristics., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (1): 170-183 (2017)ILP-Based Identification of Redundant Logic Insertions for Opportunistic Yield Improvement during Early Process Learning., , and . ICCD, page 269-272. IEEE Computer Society, (2017)Toward quantifying the IC design value of interconnect technology improvements., , and . SLIP, page 1-6. IEEE Computer Society, (2013)