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Optimizing pipelines for power and performance., , , , , , и . MICRO, стр. 333-344. ACM/IEEE Computer Society, (2002)When prefetching improves/degrades performance., , , и . Conf. Computing Frontiers, стр. 342-352. ACM, (2005)New methodology for early-stage, microarchitecture-level power-performance analysis of microprocessors., , , , , и . IBM J. Res. Dev., 47 (5-6): 653-670 (2003)3D stacking of high-performance processors., , , , , , , , , и . HPCA, стр. 500-511. IEEE Computer Society, (2014)Integrated Analysis of Power and Performance for Pipelined Microprocessors., , , , , , и . IEEE Trans. Computers, 53 (8): 1004-1016 (2004)Industrial Perspectives: The Next Roadblocks in SOC Evolution: On-Chip Storage Capacity and Off-Chip Bandwidth.. HPCA, стр. 201-201. IEEE Computer Society, (2006)The End of Scaling? Revolutions in Technology and Microarchitecture as We Pass the 90 Nanometer Node.. ISCA, стр. 128. IEEE Computer Society, (2006)Duplicon Cache: Mitigating Off-Chip Memory Bank and Bank Group Conflicts Via Data Duplication., , , , и . MICRO, стр. 285-297. IEEE Computer Society, (2018)Rethinking Refresh: Increasing Availability and Reducing Power in DRAM for Cache Applications., , и . IEEE Micro, 28 (6): 47-56 (2008)Early-Stage Definition of LPX: A Low Power Issue-Execute Processor., , , , , , , , , и 6 other автор(ы). PACS, том 2325 из Lecture Notes in Computer Science, стр. 1-17. Springer, (2002)