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15.9 A 16nm 16Mb Embedded STT-MRAM with a 20ns Write Time, a 1012 Write Endurance and Integrated Margin-Expansion Schemes.

K. Lin, H. Noguchi, Y. Shih, P. Yuh, Y. Lee, T. Chang, S. Huang, Y. Lin, C. Lee, Y. Huang, J. Tsai, S. Adham, P. Noel, R. Yazdi, M. Gershoig, Y. Shin, V. Joshi, T. Wong, M. Jiang, J. Wu, C. Cheng, Y. Wang, H. Chuang, Y. Chih, Y. Wang, and T. Chang. ISSCC, page 292-294. IEEE, (2024)

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Hsiang-Huang Wu

Chu-Hsiang Huang

Shih Yen Huang

Yen-Chin Huang

Yen Yen Kwan

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15.9 A 16nm 16Mb Embedded STT-MRAM with a 20ns Write Time, a 1012 Write Endurance and Integrated Margin-Expansion Schemes.K. Lin, H. Noguchi, Y. Shih, P. Yuh, Y. Lee, T. Chang, S. Huang, Y. Lin, C. Lee, Y. Huang and 16 other author(s). ISSCC, page 292-294. IEEE, (2024)An 8-Mb DC-Current-Free Binary-to-8b Precision ReRAM Nonvolatile Computing-in-Memory Macro using Time-Space-Readout with 1286.4-21.6TOPS/W for Edge-AI Devices.J. Hung, Y. Huang, S. Huang, F. Chang, T. Wen, C. Su, W. Khwa, C. Lo, R. Liu, C. Hsieh and 4 other author(s). ISSCC, page 1-3. IEEE, (2022)Stereo Imaging Using Hardwired Self-Organizing Object Segmentation.C. Chen, G. Lan, C. Chen, and Y. Huang. Sensors, 20 (20): 5833 (2020)Design and Development of a Low-Power Wireless MEMS Lead-Free Piezoelectric Accelerometer System.C. Li, Z. Chen, H. Kao, S. Chang, P. Hsiao, Y. Huang, Y. Huang, S. Chu, C. Wei, Y. Liu and 2 other author(s). IEEE Trans. Instrum. Meas., (2023)On Legalization of Die Bonding Bumps and Pads for 3-D ICs.Y. Huang, S. Pentapati, A. Agnesina, M. Brunion, and S. Lim. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 43 (9): 2741-2754 (September 2024)On Legalization of Die Bonding Bumps and Pads for 3D ICs.S. Pentapati, A. Agnesina, M. Brunion, Y. Huang, and S. Lim. ISPD, page 62-70. ACM, (2023)8-b Precision 8-Mb ReRAM Compute-in-Memory Macro Using Direct-Current-Free Time-Domain Readout Scheme for AI Edge Devices.J. Hung, T. Wen, Y. Huang, S. Huang, F. Chang, C. Su, W. Khwa, C. Lo, R. Liu, C. Hsieh and 4 other author(s). IEEE J. Solid State Circuits, 58 (1): 303-315 (2023)A 22nm 4Mb 8b-Precision ReRAM Computing-in-Memory Macro with 11.91 to 195.7TOPS/W for Tiny AI Edge Devices.C. Xue, J. Hung, H. Kao, Y. Huang, S. Huang, F. Chang, P. Chen, T. Liu, C. Jhang, C. Su and 8 other author(s). ISSCC, page 245-247. IEEE, (2021)

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Disambiguation of "Huang, Yen-Hsiang"

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15.9 A 16nm 16Mb Embedded STT-MRAM with a 20ns Write Time, a 1012 Write Endurance and Integrated Margin-Expansion Schemes.

Please choose a person to relate this publication to

Hsiang-Huang Wu

Chu-Hsiang Huang

Shih Yen Huang

Yen-Chin Huang

Yen Yen Kwan

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Huang, Yen-Hsiang"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 15.9 A 16nm 16Mb Embedded STT-MRAM with a 20ns Write Time, a 1012 Write Endurance and Integrated Margin-Expansion Schemes.

Please choose a person to relate this publication to

Hsiang-Huang Wu

Chu-Hsiang Huang

Shih Yen Huang

Yen-Chin Huang

Yen Yen Kwan

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
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Chicago
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15.9 A 16nm 16Mb Embedded STT-MRAM with a 20ns Write Time, a 1012 Write Endurance and Integrated Margin-Expansion Schemes.